Patents by Inventor Jaroslaw Sydir

Jaroslaw Sydir has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220326999
    Abstract: Apparatuses, methods, and systems for dynamic resource allocation based on quality-of-service prediction are disclosed. In embodiments, an apparatus includes quality-of-service prediction circuitry and a resource controller. The quality-of-service prediction circuitry is to make quality-of-service predictions using a model based at least in part on at least one performance counter measurements and at least one quality-of-service measurement. The resource controller is to allocate one or more shared resources based on the quality-of-service predictions and architectural performance counter measurements.
    Type: Application
    Filed: June 29, 2022
    Publication date: October 13, 2022
    Inventors: Drew Penney, Bin Li, Tsung-Yuan Tai, Anna Drewek-Ossowicka, Rameshkumar Illikkal, Andrew J. Herdrich, Jaroslaw Sydir
  • Patent number: 11304024
    Abstract: Described herein is an apparatus comprising a location-awareness determination circuit configured to determine a location of the apparatus; at least one processor configured to determine at least one contextual factor of the apparatus including a type identifier of the determined location; an app-management facilitator configured to activate at least one mobile application (“app”) that is associated with the determined location of the apparatus based, at least in part, upon the determined at least one contextual factor; and deactivate at least one of the selected apps on the apparatus when the apparatus exits the location, based on the determined at least one contextual factor of the apparatus.
    Type: Grant
    Filed: November 15, 2017
    Date of Patent: April 12, 2022
    Assignee: Apple Inc.
    Inventors: Anthony LaMarca, Kirk Skeba, Jaroslaw Sydir
  • Publication number: 20190141471
    Abstract: Described herein is a method of application management comprising determining a location of a mobile device; determining at least one contextual factor of the mobile device; tracking usage of one or more mobile applications (“apps”) of the mobile device while at the determined location; generating an association between the determined location, determined at least one contextual factor, and the one or more tracked apps; and facilitating storage of the association in a database.
    Type: Application
    Filed: January 2, 2019
    Publication date: May 9, 2019
    Inventors: Anthony LaMarca, Kirk Skeba, Jaroslaw Sydir
  • Publication number: 20180167766
    Abstract: Described herein is an apparatus comprising a location-awareness determination circuit configured to determine a location of the apparatus; at least one processor configured to determine at least one contextual factor of the apparatus including a type identifier of the determined location; an app-management facilitator configured to activate at least one mobile application (“app”) that is associated with the determined location of the apparatus based, at least in part, upon the determined at least one contextual factor; and deactivate at least one of the selected apps on the apparatus when the apparatus exits the location, based on the determined at least one contextual factor of the apparatus.
    Type: Application
    Filed: November 15, 2017
    Publication date: June 14, 2018
    Inventors: Anthony LaMarca, Kirk Skeba, Jaroslaw Sydir
  • Publication number: 20110110289
    Abstract: Embodiments of systems and methods for distributed control relay architecture are described herein. Other embodiments may be described and claimed.
    Type: Application
    Filed: September 24, 2010
    Publication date: May 12, 2011
    Inventors: Muthaiah Venkatachalam, Xiangying Yang, Jaroslaw Sydir, Avishay Sharaga, Shanidev Mohanty
  • Patent number: 7529924
    Abstract: A data processing device includes a crypto unit having an alignment buffer for providing data to transmit buffer elements of a media switch fabric in multiples of a predetermined number of bytes. Ciphered data for a packet can be split over first and second transmit buffer elements so as to reduce the amount of software intervention.
    Type: Grant
    Filed: December 30, 2003
    Date of Patent: May 5, 2009
    Assignee: Intel Corporation
    Inventors: Jaroslaw Sydir, Kamal J. Koshy, Wajdi Feghali, Bradley A. Burres, Gilbert M. Wolrich
  • Publication number: 20070140282
    Abstract: Methods and apparatus, including computer program products, implementing techniques for monitoring a state of a device of a switched fabric network, the device including on-chip queues to store queue descriptors and a data buffer to store data packets, each queue descriptor having a corresponding data packet; detecting a first trigger condition to transition the device from a first state to a second state; and recovering space in the data buffer in response to the first trigger condition detecting, the recovering comprising selecting one or more of the on-chip queues for discard, and removing the data packets corresponding to queue descriptors in the selected one or more on-chip queues from the data buffer.
    Type: Application
    Filed: December 21, 2005
    Publication date: June 21, 2007
    Inventors: Sridhar Lakshmanamurthy, Hugh Wilkinson, Jaroslaw Sydir, Paul Dormitzer
  • Publication number: 20070070925
    Abstract: An adaptive baseband processing system having a scalable architecture to allow scaling to support adaptive transmission and receive, at different granularity, channel vs. subchannel, for different number of antennas and/or users, including their components, are described herein. In various embodiments, the components include a front-end processor, an AAS processor and a back-end processor.
    Type: Application
    Filed: September 23, 2005
    Publication date: March 29, 2007
    Inventors: Jaroslaw Sydir, Kamal Koshy
  • Publication number: 20070071118
    Abstract: An adaptive baseband processing system having a scalable architecture to allow scaling to support adaptive transmission and receive, at different granularity, channel vs. subchannel, for different number of antennas and/or users, including their components, are described herein. In various embodiments, the components include a front-end processor, an AAS processor and a back-end processor.
    Type: Application
    Filed: September 23, 2005
    Publication date: March 29, 2007
    Inventors: Jaroslaw Sydir, Kamal Koshy
  • Publication number: 20060059219
    Abstract: An arrangement is provided for performing modular exponentiations. A modular exponentiation may be performed by using multiple Montgomery multiplications. A Montgomery multiplication comprises a plurality of iterations of basic operations (e.g., carry-save additions), and is performed by a Montgomery multiplication engine (MME). Multiple MMEs of smaller sizes may be chained together to perform modular exponentiations of larger sizes. Additionally, a single MME of a smaller size may be scheduled to perform modular exponentiations of larger sizes. Moreover, the process of performing a Montgomery multiplication may be pipelined both horizontally and vertically. Furthermore, processes of performing two Montgomery multiplications may be interleaved and performed by the same MME or chained MMEs.
    Type: Application
    Filed: September 16, 2004
    Publication date: March 16, 2006
    Inventors: Kamal Koshy, Gilbert Wolrich, Jaroslaw Sydir, Wajdi Feghali
  • Publication number: 20060059220
    Abstract: An arrangement is provided for performing Montgomery multiplications. A Montgomery multiplication comprises a plurality of iterations of basic operations (e.g., carry-save additions), and is performed by a Montgomery multiplication engine (MME). Basic operations in each iteration may be performed by multiple Montgomery multiplication processing elements (MMPEs). An MME may be arranged to pipeline the process of performing iterations of multiple basic operations and other operations required to complete a Montgomery multiplication both horizontally and vertically. An MME may also be arranged to interleave processes of performing two Montgomery multiplications.
    Type: Application
    Filed: September 16, 2004
    Publication date: March 16, 2006
    Inventors: Kamal Koshy, Gilbert Wolrich, Jaroslaw Sydir, Wajdi Feghali
  • Publication number: 20060010327
    Abstract: An arrangement is provided for performing MD5 digesting. The arrangement includes apparatuses and methods that pipeline the MD5 digesting process to produce a 128 bit digest for an input message of any arbitrary length.
    Type: Application
    Filed: June 25, 2004
    Publication date: January 12, 2006
    Inventors: Kamal Koshy, Jaroslaw Sydir, Wajdi Feghali
  • Publication number: 20050238166
    Abstract: An arrangement is provided for performing the KASUMI ciphering process. The arrangement includes apparatuses and methods that parallelize computations of two FI functions in KASUMI rounds within one clock cycle and computes two consecutive FL functions in the KASUMI rounds within one clock cycle.
    Type: Application
    Filed: April 27, 2004
    Publication date: October 27, 2005
    Inventors: Kamal Koshy, Jaroslaw Sydir, Wajdi Feghali
  • Publication number: 20050240764
    Abstract: An arrangement is provided for performing RC4 ciphering. The arrangement includes apparatuses and methods that pipeline generation of a key stream based on a byte state array, called the S-box, which is initially generated from a secret key shared by a receiver and a transmitter in a network system. The S-box is stored in a storage device which may be a register file with two read ports and one write port. A cache is used to store a number of bytes read from the S-box storage device.
    Type: Application
    Filed: April 27, 2004
    Publication date: October 27, 2005
    Inventors: Kamal Koshy, Jaroslaw Sydir, Wajdi Feghali
  • Publication number: 20050154960
    Abstract: Configurable CRC calculation engines and methods of performing CRC calculations are presented. The configurable CRC calculation engines calculate a CRC value for the data using an associated polynomial and remainder. The method includes receiving a polynomial, receiving a block of data to determine a CRC value for, and calculating a CRC value for the data using the polynomial. With such devices and methods, the configurable CRC calculation engines are useful in various applications and protocols.
    Type: Application
    Filed: December 30, 2003
    Publication date: July 14, 2005
    Inventors: Jaroslaw Sydir, Alok Mathur, Wajdi Feghali, Kamal Koshy, Eduard Lecha
  • Publication number: 20050149725
    Abstract: A data processing device includes a crypto unit having an alignment buffer for providing data to transmit buffer elements of a media switch fabric in multiples of a predetermined number of bytes. Ciphered data for a packet can be split over first and second transmit buffer elements so as to reduce the amount of software intervention.
    Type: Application
    Filed: December 30, 2003
    Publication date: July 7, 2005
    Inventors: Jaroslaw Sydir, Kamal Koshy, Wajdi Feghali, Bradley Burres, Gilbert Wolrich
  • Publication number: 20050149691
    Abstract: According to some embodiments, a processing element includes (i) a next neighbor register to receive information directly from a previous processing element in a series of processing elements, and (ii) a previous neighbor register to receive information directly from a next processing element in the series.
    Type: Application
    Filed: December 24, 2003
    Publication date: July 7, 2005
    Inventors: Sridhar Lakshmanamurthy, Prashant Chandra, Wilson Liao, Jeen-Yuan Miin, Pun Yim, Chen-Chi Kuo, Jaroslaw Sydir
  • Publication number: 20050149744
    Abstract: A network processing having cryptographic processing includes an authentication buffer for storing ciphered data and providing the ciphered data to an authentication core.
    Type: Application
    Filed: December 29, 2003
    Publication date: July 7, 2005
    Inventors: Jaroslaw Sydir, Kamal Koshy, Wajdi Feghali, Bradley Burres, Gilbert Wolrich
  • Publication number: 20050141715
    Abstract: A method and apparatus for scheduling the processing of commands by a plurality of cryptographic algorithm cores in a network processor.
    Type: Application
    Filed: December 29, 2003
    Publication date: June 30, 2005
    Inventors: Jaroslaw Sydir, Chen-Chi Kuo, Kamal Koshy, Wajdi Feghali, Bradley Burres, Gilbert Wolrich
  • Publication number: 20050138368
    Abstract: A method and apparatus is described for processing of network data packets by a network processor having cipher processing cores and authentication processing cores which operate on data within the network data packets, in order to provide a one-pass ciphering and authentication processing of the network data packets.
    Type: Application
    Filed: December 19, 2003
    Publication date: June 23, 2005
    Inventors: Jaroslaw Sydir, Kamal Koshy, Wajdi Feghali, Bradley Burres, Gilbert Wolrich