Patents by Inventor Jarrod Colin James Blackburn

Jarrod Colin James Blackburn has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • High-level language code sequence optimization for implementing programmable chip designs
    Patent number: 9329847
    Abstract: Methods and apparatus are provided for implementing a programmable chip using a high-level language. Code sequences such as high-level language software critical loops are converted into read/transform/write (RXW) processes with buffer based flow control between the processes. Having separate read and write processes allows an arbitrary number of sequential reads/writes to occur in any order, subject to buffer size, allowing bursting/sequential transactions that are more efficient than random accesses.
    Type: Grant
    Filed: November 1, 2013
    Date of Patent: May 3, 2016
    Assignee: ALTERA CORPORATION
    Inventors: Jeffrey Orion Pritchard, Jarrod Colin James Blackburn, David James Lau, Philippe Molson, James L. Ball, Jesse Kempa
  • High-level language code sequence optimization for implementing programmable chip designs
    Patent number: 8578356
    Abstract: Methods and apparatus are provided for implementing a programmable chip using a high-level language. Code sequences such as high-level language software critical loops are converted into read/transform/write (RXW) processes with buffer based flow control between the processes. Having separate read and write processes allows an arbitrary number of sequential reads/writes to occur in any order, subject to buffer size, allowing bursting/sequential transactions that are more efficient than random accesses.
    Type: Grant
    Filed: December 13, 2010
    Date of Patent: November 5, 2013
    Assignee: Altera Corporation
    Inventors: Jeffrey Orion Pritchard, Jarrod Colin James Blackburn, David James Lau, Philippe Molson, James L. Ball, Jesse Kempa
  • High-level language code sequence optimization for implementing programmable chip designs
    Patent number: 7873953
    Abstract: Methods and apparatus are provided for implementing a programmable chip using a high-level language. Code sequences such as high-level language software critical loops are converted into read/transform/write (RXW) processes with buffer based flow control between the processes. Having separate read and write processes allows an arbitrary number of sequential reads/writes to occur in any order, subject to buffer size, allowing bursting/sequential transactions that are more efficient than random accesses.
    Type: Grant
    Filed: March 20, 2006
    Date of Patent: January 18, 2011
    Assignee: Altera Corporation
    Inventors: Jeffrey Orion Pritchard, Jarrod Colin James Blackburn, David James Lau, Philippe Molson, James L. Ball, Jesse Kempa