Patents by Inventor Jasdeep S. Dhaliwal

Jasdeep S. Dhaliwal has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12013713
    Abstract: The present disclosure is directed to a system implementing a sensor. A sensing system is implemented in a functional circuit block that is coupled to a global supply voltage node. The sensing system includes a power converter circuit configured to generate a regulated voltage level on a local supply node using the voltage present on the global supply voltage node. The system also includes a sensor circuit coupled to receive the regulated voltage node, wherein the sensor is configured to compare corresponding parameters of different ones of a number of subset of device at a plurality of different time points and generate a plurality of comparison results. The comparisons generate an analog signal that is proportional to the operating parameter. An analog-to-digital converter (ADC) is coupled to receive the analog signal and generate a plurality of bits corresponding thereto.
    Type: Grant
    Filed: September 25, 2020
    Date of Patent: June 18, 2024
    Assignee: Apple Inc.
    Inventors: Ali Mesgarani, Ke Yun, Seyedeh Sedigheh Hashemi, Jasdeep S. Dhaliwal, Mansour Keramat, Jafar Savoj, Bruno W. Garlepp, Vahid Majidzadeh Bafar, Emerson S. Fang
  • Publication number: 20220100220
    Abstract: The present disclosure is directed to a system implementing a sensor. A sensing system is implemented in a functional circuit block that is coupled to a global supply voltage node. The sensing system includes a power converter circuit configured to generate a regulated voltage level on a local supply node using the voltage present on the global supply voltage node. The system also includes a sensor circuit coupled to receive the regulated voltage node, wherein the sensor is configured to compare corresponding parameters of different ones of a number of subset of device at a plurality of different time points and generate a plurality of comparison results. The comparisons generate an analog signal that is proportional to the operating parameter. An analog-to-digital converter (ADC) is coupled to receive the analog signal and generate a plurality of bits corresponding thereto.
    Type: Application
    Filed: September 25, 2020
    Publication date: March 31, 2022
    Inventors: Ali Mesgarani, Ke Yun, Seyedeh Sedigheh Hashemi, Jasdeep S. Dhaliwal, Mansour Keramat, Jafar Savoj, Bruno W. Garlepp, Vahid Majidzadeh Bafar, Emerson S. Fang