Patents by Inventor Jaseem AHAMMED

Jaseem AHAMMED has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250112717
    Abstract: An apparatus and method of generating an output transmit signal including generating a first portion of an output transmit signal based on an input transmit signal, wherein the first portion of the output transmit signal includes a first set of pulses each spanning a unit interval (UI); generating a second portion of the output transmit signal based on the input transmit signal, wherein the second portion of the output signal includes a second set of pulses each spanning a middle sub-interval of the UI; and combining the first portion with the second portion to generate the output transmit signal.
    Type: Application
    Filed: September 29, 2023
    Publication date: April 3, 2025
    Inventors: Patrick ISAKANIAN, Jaseem AHAMMED
  • Publication number: 20250038738
    Abstract: A reconfigurable driver in an I/O circuit has a first transistor provided in a first pullup structure, a second transistor provided in a second pullup structure, and a control circuit that generates a control signal provided to a gate of the second transistor. A gate of the first transistor receives a data signal. The control signal is an inverted, delayed version of the data signal in a first mode. The control signal turns off the second transistor in a second mode. The control circuit generates the control signal using a version of the data signal when operated in a third mode. The second pullup structure may be used to provide one-shot equalization to an output of the reconfigurable driver when the second pullup structure is operated in the first mode. The second transistor may be a thin-oxide PMOS transistor. The first transistor may be a thin-oxide NMOS transistor.
    Type: Application
    Filed: July 25, 2023
    Publication date: January 30, 2025
    Inventors: Jaseem AHAMMED, Ashwin SETHURAM
  • Publication number: 20240250526
    Abstract: An ESD protection circuit in an interface circuit has a first diode coupled between a power source of an integrated circuit device and an input/output pad of the integrated circuit device, a second diode coupled between a first terminal of a first resistive element and the input/output pad, with a second terminal of the first resistive element being coupled to the power source, a second resistive element that couples the second diode to the first diode and to the input/output pad; a first clamping circuit coupled between the power source and a ground reference of the integrated circuit device, and a second clamping circuit coupled between the first terminal of the first resistive element and the ground reference. The power source supplies a driver circuit coupled to the input/output pad.
    Type: Application
    Filed: January 20, 2023
    Publication date: July 25, 2024
    Inventors: Jaseem AHAMMED, Ashwin SETHURAM, Gurmukh SINGH