Patents by Inventor Jaskarn Johal

Jaskarn Johal has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11734540
    Abstract: Backflow in rectifiers may be reduced via biasing. Upon determining that backflow within a rectifier is likely, one or more rectifying elements in the rectifier may be debiased, via analog or digital means. The debiased rectifying elements become less conductive or nonconductive, thereby reducing or preventing backflow. The determination of backflow likelihood may be performed based on a signal to be backscattered or the amplitude-modulated envelope of an incident RF wave, and may be digital or analog in nature.
    Type: Grant
    Filed: November 24, 2021
    Date of Patent: August 22, 2023
    Assignee: Impinj, Inc.
    Inventors: Amita Patil, Jay A. Kuhn, Charles J. T. Peach, John D. Hyde, Jaskarn Johal
  • Patent number: 11188803
    Abstract: Backflow in rectifiers may be reduced via biasing. Upon determining that backflow within a rectifier is likely, one or more rectifying elements in the rectifier may be debiased, via analog or digital means. The debiased rectifying elements become less conductive or nonconductive, thereby reducing or preventing backflow. The determination of backflow likelihood may be performed based on a signal to be backscattered or the amplitude-modulated envelope of an incident RF wave, and may be digital or analog in nature.
    Type: Grant
    Filed: March 6, 2020
    Date of Patent: November 30, 2021
    Assignee: Impinj, Inc.
    Inventors: Amita Patil, Jay A. Kuhn, Charles J. T. Peach, John D. Hyde, Jaskarn Johal
  • Patent number: 8717070
    Abstract: An integrated circuit device can include a plurality of analog circuit blocks, each comprising an input section configured to receive an analog input signal, and an output section configured to drive a plurality of output signals corresponding to the input signal, each output signal having a different maximum drive strength; and a signal network comprising a plurality of switches, and providing a configurable connection between at least outputs of the analog circuit blocks and a plurality of N connections to the integrated circuit device, including less than N direct signal paths between each analog circuit block and the N connections.
    Type: Grant
    Filed: June 27, 2013
    Date of Patent: May 6, 2014
    Assignee: Cypress Semiconductor Corporation
    Inventors: Hans Klein, Jaskarn Johal, Harold Kutz, Jean-Paul Vanitegem
  • Patent number: 8674672
    Abstract: A power supply includes a source signal generating circuit, an output stage, and a feedback stage. The power supply further includes a replica stage configured to replicate a response of the output stage to the source signal, and an output regulator coupling the replica stage to the output stage, configured to adjust a feedback signal to the source signal generating circuit by shunting the feedback stage when a loaded output stage response does not match a response of the replica stage to the source signal.
    Type: Grant
    Filed: December 30, 2011
    Date of Patent: March 18, 2014
    Assignee: Cypress Semiconductor Corporation
    Inventors: Jaskarn Johal, Erhan Hancioglu
  • Patent number: 7710776
    Abstract: A system and method for determining a SONOS VT window using a current sensing scheme is disclosed. The present invention creates a first current path and a second current path through the volatile and non-volatile sections of an nvSRAM memory cell. The erase threshold voltage of the first edge of the window is determined when current is detected in the first path. The program voltage of the second edge of the window is determined when current is detected in the second path. Accordingly, the voltage used to power a plurality of SONOS transistors may be set using the values of the first and second threshold edges to determine the VT window.
    Type: Grant
    Filed: December 27, 2006
    Date of Patent: May 4, 2010
    Assignee: Cypress Semiconductor Corporation
    Inventors: Jaskarn Johal, Daryl Dietrich, John Roger Gill
  • Publication number: 20080158981
    Abstract: A system and method for determining a SONOS VT window using a current sensing scheme is disclosed. The present invention creates a first current path and a second current path through the volatile and non-volatile sections of an nvSRAM memory cell. The erase threshold voltage of the first edge of the window is determined when current is detected in the first path. The program voltage of the second edge of the window is determined when current is detected in the second path. Accordingly, the voltage used to power a plurality of SONOS transistors may be set using the values of the first and second threshold edges to determine the VT window.
    Type: Application
    Filed: December 27, 2006
    Publication date: July 3, 2008
    Inventors: Jaskarn Johal, Daryl Dietrich, John Roger Gill