Patents by Inventor Jasleen M. Raisinghani

Jasleen M. Raisinghani has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5805005
    Abstract: A voltage level converter circuit is presented that is capable of independently adjusting the falling edge and rising edge delays of the output signal. The circuit includes two separate transconductance amplifiers each biased independently. Each one of the transconductance amplifiers separately drives an output transistor. The circuit is particularly suited for converting ECL signals to CMOS logic levels.
    Type: Grant
    Filed: August 22, 1997
    Date of Patent: September 8, 1998
    Assignee: Exar Corporation
    Inventors: Jasleen M. Raisinghani, Craig N. Lambert