Patents by Inventor Jason A. Mix

Jason A. Mix has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250093413
    Abstract: A high volume manufacturing (HVM) test system including a test device defining an opening configured to receive a package under test, the test device including an external access agent (EAA) including: a first leaky surface wave launcher for near field wireless communication, the first leaky surface wave launcher configured to wirelessly provide sideband signals to and wirelessly receive the sideband signals from a silicon package agent physically positioned in a separate package as the EAA; and a first transceiver electrically coupled to the first leaky surface wave launcher, the first transceiver configured to: process the sideband signals received by the first leaky surface wave launcher; and generate the sideband signals for wireless transmission by the first leaky surface wave launcher.
    Type: Application
    Filed: November 29, 2024
    Publication date: March 20, 2025
    Inventors: Zhen ZHOU, Renzhi LIU, Jong-Ru GUO, Kenneth P. FOUST, Jason A. MIX, Kai XIAO, Zuoguo WU, Daqiao DU
  • Patent number: 12196807
    Abstract: A package substrate may include a circuit and a leaky surface wave launcher. The circuit may perform engineering tests and end-user operations using sideband signals. The leaky surface wave launcher may perform near field wireless communication. The leaky surface wave launcher may include a via and a strip line. The via may be electrically coupled to the circuit. The via may provide the sideband signals to and receive the sideband signals from the circuit. The strip line may be electrically coupled to the via. The strip line may be excited by the sideband signals to wirelessly couple the leaky surface wave launcher with an external device. The strip line and the via may be unbalanced such that the strip line generates a leaky wave that propagates at least a portion of the package substrate and an environment proximate the package substrate.
    Type: Grant
    Filed: December 24, 2020
    Date of Patent: January 14, 2025
    Assignee: Intel Corporation
    Inventors: Zhen Zhou, Renzhi Liu, Jong-Ru Guo, Kenneth P. Foust, Jason A. Mix, Kai Xiao, Zuoguo Wu, Daqiao Du
  • Publication number: 20240429862
    Abstract: Embodiments herein relate to a reference clock that includes an array of resonators with different turnover temperatures. The resonators may be Microelectromechanical Systems (MEMS) resonators with different doping concentrations, or quartz crystal resonators with different cut angles, for example. For MEMS resonators in particular, the turnover temperature can be adjusted by providing an overlying oxide layer with different thicknesses. In another approach, the resonators are piezoelectric-on-silicon resonators with different finger pitch-to-thickness ratios. A control circuit obtains a sensed temperature from a temperature sensor and selects one of the resonators having a turnover temperature in a temperature range corresponding to the sensed temperature. Each resonator may have a turnover temperature in a different temperature range. The resonators may have separate drivers or have a common driver.
    Type: Application
    Filed: June 23, 2023
    Publication date: December 26, 2024
    Inventors: Sarah Shahraini, Mohamed A. Abdelmoneum, Renzhi Liu, Brent R. Carlton, Timo Sakari Huusari, Jason A. Mix, Ruth Yadira Vidana Morales
  • Publication number: 20230420396
    Abstract: In various aspects, a device-to-device communication system is provided including a first device and a second device. Each of the first device and the second device includes an antenna, a radio frequency frond-end circuit, and a baseband circuit. Each of the first device and the second device are at least one of a chiplet or a package. The device-to-device communication system further includes a cover structure housing the first device and the second device. Each of the first device and the second device are at least one of a chiplet or a package. The device-to-device communication system further includes a radio frequency signal interface wirelessly communicatively coupling the first device and the second device. The radio frequency signal interface includes the first antenna and the second antenna.
    Type: Application
    Filed: December 23, 2020
    Publication date: December 28, 2023
    Inventors: Tolga ACIKALIN, Arnaud AMADJIKPE, Brent R. CARLTON, Chia-Pin CHIU, Timothy F. COX, Kenneth P. FOUST, Bryce D. HORINE, Telesphor KAMGAING, Renzhi LIU, Jason A. MIX, Sai VADLAMANI, Tae Young YANG, Zhen ZHOU
  • Publication number: 20230402990
    Abstract: Clock distribution in an integrated circuit component can comprise the generation of bulk acoustic waves by acoustic transmitters and propagation of the bulk acoustic waves across the substrate where they are received by piezoelectric elements acting as acoustic receivers. Clock distribution can also comprise the generation of surface acoustic waves by acoustic transmitters located on the same substrate surface as the piezoelectric elements. An acoustic transmitter comprises a layer of piezoelectric material that generates an acoustic wave in response to the piezoelectric layer being activated by a clock source signal applied to the acoustic transmitter. The piezoelectric elements convert the acoustic waves into an electrical signal which can be used as a local clock signal for devices and components in the vicinity of the piezoelectric elements or from which such a local clock signal can be derived.
    Type: Application
    Filed: April 14, 2023
    Publication date: December 14, 2023
    Applicant: Intel Corporation
    Inventors: Jason A. Mix, Liwei Zhao, Alexander T. Hoang, Sarah Shahraini, Ruth Y. Vidana Morales, Andrew Martwick, Andrea S. Muljono
  • Publication number: 20220206064
    Abstract: A package substrate may include a circuit and a leaky surface wave launcher. The circuit may perform engineering tests and end-user operations using sideband signals. The leaky surface wave launcher may perform near field wireless communication. The leaky surface wave launcher may include a via and a strip line. The via may be electrically coupled to the circuit. The via may provide the sideband signals to and receive the sideband signals from the circuit. The strip line may be electrically coupled to the via. The strip line may be excited by the sideband signals to wirelessly couple the leaky surface wave launcher with an external device. The strip line and the via may be unbalanced such that the strip line generates a leaky wave that propagates at least a portion of the package substrate and an environment proximate the package substrate.
    Type: Application
    Filed: December 24, 2020
    Publication date: June 30, 2022
    Inventors: Zhen ZHOU, Renzhi LIU, Jong-Ru GUO, Kenneth P. FOUST, Jason A. MIX, Kai XIAO, Zuoguo WU, Daqiao DU
  • Patent number: 10955543
    Abstract: A positioning device and positioning method in which a first wireless signal is transmitted along a first signal path having a first signal path angle that changes relative to time; second wireless signal data representing a response of a wireless station to the first wireless signal is received; a third wireless signal is transmitted along a second signal path; and an assumption that an obstruction is between the wireless communication device and the wireless station is generated if the wireless communication device receives a response from the wireless station to the first wireless signal but does not receive a response from the wireless station to the third wireless signal; wherein the second signal path is a linear path.
    Type: Grant
    Filed: December 20, 2019
    Date of Patent: March 23, 2021
    Assignee: INTEL CORPORATION
    Inventors: Glen J. Anderson, Tae Young Yang, Jason A. Mix, Chieh-Yih Wan
  • Publication number: 20200142051
    Abstract: A positioning device and positioning method in which a first wireless signal is transmitted along a first signal path having a first signal path angle that changes relative to time; second wireless signal data representing a response of a wireless station to the first wireless signal is received; a third wireless signal is transmitted along a second signal path; and an assumption that an obstruction is between the wireless communication device and the wireless station is generated if the wireless communication device receives a response from the wireless station to the first wireless signal but does not receive a response from the wireless station to the third wireless signal; wherein the second signal path is a linear path.
    Type: Application
    Filed: December 20, 2019
    Publication date: May 7, 2020
    Inventors: Glen J. ANDERSON, Tae Young YANG, Jason A. MIX, Chieh-Yih WAN
  • Patent number: 10270271
    Abstract: The apparatus includes an apparatus for harvesting energy. The apparatus includes a textile having an insulating substrate, a direct current (DC) power bus structure disposed in the insulating substrate, and multiple transducers. The DC power bus includes a positive conductor and a ground conductor. The transducers are secured to the insulating substrate and in electrical contact with the positive conductor and the ground conductor. Additionally, the DC bus remains conductively coupled to the transducers remaining in the textile after the textile is cut.
    Type: Grant
    Filed: June 30, 2017
    Date of Patent: April 23, 2019
    Assignee: Intel Corporation
    Inventors: Jose R. Camacho Perez, Hector A. Cordourier Maruri, Paulo Lopez Meyer, Julio C. Zamora Esquivel, Jason A. Mix
  • Publication number: 20190006863
    Abstract: The apparatus includes an apparatus for harvesting energy. The apparatus includes a textile having an insulating substrate, a direct current (DC) power bus structure disposed in the insulating substrate, and multiple transducers. The DC power bus includes a positive conductor and a ground conductor. The transducers are secured to the insulating substrate and in electrical contact with the positive conductor and the ground conductor. Additionally, the DC bus remains conductively coupled to the transducers remaining in the textile after the textile is cut.
    Type: Application
    Filed: June 30, 2017
    Publication date: January 3, 2019
    Inventors: Jose R. Camacho Perez, Hector A. Cordourier Maruri, Paulo Lopez Meyer, Julio C. Zamora Esquivel, Jason A. Mix
  • Patent number: 9632961
    Abstract: Techniques for decoding encoded data are described herein. An example of a device in accordance with the present techniques includes a receiving signaling module coupled to a plurality of signal lines. The signaling module includes a receiver to receive a plurality of encoded line voltages or currents on the plurality of signal lines of a bus, wherein each one of the plurality of encoded line voltages corresponds to a weighted sum of data. The signaling module includes a comparator to determine the voltage level of each line at a unit interval and convert the voltage level to a digital value. The signaling module includes a lookup table correlating the digital value with a digital bit stream.
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: April 25, 2017
    Assignee: INTEL CORPORATION
    Inventors: Olufemi B. Oluwafemi, Stephen H. Hall, Jason A. Mix, Earl J. Wight, Chaitanya Sreerama, Michael W. Leddige, Paul G. Huray
  • Patent number: 9330039
    Abstract: Techniques for encoding data are described herein. An example of a device in accordance with the present techniques includes a signaling module coupled to a plurality of digital inputs. The signaling module is to encode data received at the plurality of digital inputs to generate encoded data. Based on the encoded data, the signaling module can drive line voltages on a plurality of signal lines of a bus. Each one of the plurality of line voltages corresponds to a weighted sum of the data received at the plurality of digital inputs.
    Type: Grant
    Filed: December 26, 2012
    Date of Patent: May 3, 2016
    Assignee: Intel Corporation
    Inventors: Stephen H. Hall, Chaitanya Sreerama, Jason A. Mix, Michael W. Leddige, Jose A. Sanchez Sanchez, Olufemi B. Oluwafemi, Paul G. Huray, Maynard C. Falconer
  • Publication number: 20140181357
    Abstract: Techniques for encoding data are described herein. An example of a device in accordance with the present techniques includes a signaling module coupled to a plurality of digital inputs. The signaling module is to encode data received at the plurality of digital inputs to generate encoded data. Based on the encoded data, the signaling module can drive line voltages on a plurality of signal lines of a bus. Each one of the plurality of line voltages corresponds to a weighted sum of the data received at the plurality of digital inputs.
    Type: Application
    Filed: December 26, 2012
    Publication date: June 26, 2014
    Inventors: Stephen H. Hall, Chaitanya Sreerama, Jason A. Mix, Michael W. Leddige, Jose A. Sanchez Sanchez, Olufemi B. Oluwafemi, Paul G. Huray, MAYNARD C. FALCONER
  • Publication number: 20140181348
    Abstract: Techniques for decoding encoded data are described herein. An example of a device in accordance with the present techniques includes a receiving signaling module coupled to a plurality of signal lines. The signaling module includes a receiver to receive a plurality of encoded line voltages or currents on the plurality of signal lines of a bus, wherein each one of the plurality of encoded line voltages corresponds to a weighted sum of data. The signaling module includes a comparator to determine the voltage level of each line at a unit interval and convert the voltage level to a digital value. The signaling module includes a lookup table correlating the digital value with a digital bit stream.
    Type: Application
    Filed: March 15, 2013
    Publication date: June 26, 2014
    Inventors: Olufemi B. Oluwafemi, Stephen H. Hall, Jason A. Mix, Earl J. Wight, Chaitanya Sreerama, Michael W. Leddige, Paul G. Huray
  • Publication number: 20140181358
    Abstract: Techniques for decoding encoded data are described herein. An example of a device in accordance with the present techniques includes a signaling module with a receiver, quantizer, and arithmetic circuit. The receiver receives a plurality of encoded line voltages or currents on a plurality of signal lines. The quantizer determines signal levels of each of the plurality of signal lines at a unit interval. The arithmetic circuit provides a plurality of digital output bits of the decoder based on the signal levels. Each one of the digital output bits is a mathematical combination of all of the signal levels.
    Type: Application
    Filed: December 28, 2013
    Publication date: June 26, 2014
    Inventors: Chaitanya Sreerama, Stephen H. Hall, Olufemi OLUWAFEMI, JASON A. Mix, Michael Leddige, Earl J. Wight, Antonio Zenteno Ramirez
  • Patent number: 7334325
    Abstract: The invention relates to an apparatus and method for improving coupling across plane discontinuities on circuit boards. A circuit board includes a discontinuity, e.g., a split, slot, or cutout, formed on a voltage reference plane. A conductive layer overlies the discontinuity. The conductive layer has a first portion connected to the underlying reference plane and a second portion spanning the discontinuity. The first portion is connected to the reference plane using a slot or vias. And the conductive layer has a third portion extending over the reference plane but remaining disconnected from it. The conductive layer might be graphite or carbon black.
    Type: Grant
    Filed: November 16, 2004
    Date of Patent: February 26, 2008
    Assignee: Intel Corporation
    Inventors: Weston Roth, Jayne L. Mershon, Xang Moua, Jason A. Mix
  • Patent number: 7282647
    Abstract: The invention relates to an apparatus and method for improving coupling across plane discontinuities on circuit boards. A circuit board includes a discontinuity, e.g., a split, slot, or cutout, formed on a voltage reference plane. A conductive layer overlies the discontinuity. The conductive layer has a first portion connected to the underlying reference plane and a second portion spanning the discontinuity. The first portion is connected to the reference plane using a slot or vias. And the conductive layer has a third portion extending over the reference plane but remaining disconnected from it. The conductive layer might be graphite or carbon black.
    Type: Grant
    Filed: December 23, 2002
    Date of Patent: October 16, 2007
    Assignee: Intel Corporation
    Inventors: Weston Roth, Jayne L. Mershon, Xang Moua, Jason A. Mix
  • Patent number: 7040934
    Abstract: In one embodiment of the invention, the apparatus includes a socket connector to connect to a backplane to receive an electronic device. The socket connector includes a plurality of pairs of signal contacts to receive signals from the electronic device, and a plurality of ground frames to ground the electronic device. The ground frames are to connect to a ground plane of the electronic device. The socket connector also includes a set of one or more ground pins to connect to the ground plane, wherein each one of the set is between each of the pairs of signal contacts.
    Type: Grant
    Filed: December 19, 2002
    Date of Patent: May 9, 2006
    Assignee: Intel Corporation
    Inventors: Yun Ling, Jason A. Mix
  • Publication number: 20040121655
    Abstract: In one embodiment of the invention, the apparatus includes a socket connector to connect to a backplane to receive an electronic device. The socket connector includes a plurality of pairs of signal contacts to receive signals from the electronic device, and a plurality of ground frames to ground the electronic device. The ground frames are to connect to a ground plane of the electronic device. The socket connector also includes a set of one or more ground pins to connect to the ground plane, wherein each one of the set is between each of the pairs of signal contacts.
    Type: Application
    Filed: December 19, 2002
    Publication date: June 24, 2004
    Inventors: Yun Ling, Jason A. Mix
  • Publication number: 20040118597
    Abstract: The invention relates to an apparatus and method for improving coupling across plane discontinuities on circuit boards. A circuit board includes a discontinuity, e.g., a split, slot, or cutout, formed on a voltage reference plane. A conductive layer overlies the discontinuity. The conductive layer has a first portion connected to the underlying reference plane and a second portion spanning the discontinuity. The first portion is connected to the reference plane using a slot or vias. And the conductive layer has a third portion extending over the reference plane but remaining disconnected from it. The conductive layer might be graphite or carbon black.
    Type: Application
    Filed: December 23, 2002
    Publication date: June 24, 2004
    Applicant: Intel Corporation
    Inventors: Weston Roth, Jayne L. Mershon, Xang Moua, Jason A. Mix