Patents by Inventor Jason An-Cheng Huang

Jason An-Cheng Huang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240114614
    Abstract: Disclosed is a thermal conduction-electrical conduction isolated circuit board with a ceramic substrate and a power transistor embedded, mainly comprising: a dielectric material layer, a heat-dissipating ceramic block, a securing portion, a stepped metal electrode layer, a power transistor, and a dielectric material packaging, wherein a via hole is formed in the dielectric material layer, the heat-dissipating ceramic block is correspondingly embedded in the via hole, the heat-dissipating ceramic block has a thermal conductivity higher than that of the dielectric material layer and a thickness less than that of the dielectric material layer, the stepped metal electrode layer conducts electricity and heat for the power transistor, the dielectric material packaging is configured to partially expose the source connecting pin, drain connecting pin, and gate connecting pin of the encapsulated stepped metal electrode layer.
    Type: Application
    Filed: September 29, 2022
    Publication date: April 4, 2024
    Inventors: HO-CHIEH YU, CHEN-CHENG-LUNG LIAO, CHUN-YU LIN, JASON AN CHENG HUANG, CHIH-CHUAN LIANG, KUN-TZU CHEN, NAI-HIS HU, LIANG-YO CHEN
  • Publication number: 20240063726
    Abstract: A low parasitic inductance power module featuring staggered, interleaving conductive members, including: at least one base extending in a length direction, at least one input bus-bar and at least one output bus-bar being disposed on the base; a first unit including a first circuit base portion disposed on the base along the width direction, a plurality of first power devices being disposed on the first circuit base portion, each of the first power devices having paralleled first current input ends and paralleled first current output ends; the first current input ends or the current output ends being conductively connected to the first circuit base portion; and a second unit. The units are serially connected to the bus-bars via staggered, interleaving input conductive members and output conductive members whereby individual inductances generated are mutually counteracted, thus reducing the overall parasitic inductance.
    Type: Application
    Filed: May 11, 2023
    Publication date: February 22, 2024
    Inventors: Jason An Cheng HUANG, Kun-Tzu CHEN, Liang-Yo CHEN, Nai-His HU, Siao-Deng HUANG
  • Publication number: 20240063149
    Abstract: A low parasitic inductance power module having staggered, interleaving busbars, including: at least one base extending a long a length direction, the base having at least one current input busbar and at least one current output busbar, the current input busbar and the current out busbar being formed with a plurality of interdigitated contact terminals, respectively; a first unit comprising a first circuit base portion disposed on the base along the width direction, on the first circuit base portion being disposed a plurality of first power devices; and a second unit, whereby when current flows through the units and the individual interdigitated contact terminals, individual inductances produced thereby are cancelled with each other, whereby overall parasitic inductance of the power module is reduced.
    Type: Application
    Filed: February 6, 2023
    Publication date: February 22, 2024
    Inventors: Jason An Cheng HUANG, Kun-Tzu CHEN, Liang-Yo CHEN, PI-SHENG HSU
  • Publication number: 20230396187
    Abstract: A power module includes two power input terminals, two main substrates, a plurality of first switches, a plurality of second switches, and a bridge main unit. The bridge main unit is across the two main substrates, and includes a first bridge subunit and a second bridge subunit. Each of the first bridge subunit and the second bridge subunit includes a first conducting region on a bottom surface, and a second conducting region and a third conducting region on a top surface. The first conducting region transmits a current signal of a current path of a switch circuit formed by the power input terminals, the first switches, and the second switches. The second conducting region is connected to the control terminals of the first switches and the second switches. The third conducting region is connected to the output terminals of the first switches and the second switches.
    Type: Application
    Filed: March 31, 2023
    Publication date: December 7, 2023
    Applicant: SENTEC E&E CO., LTD.
    Inventors: Jason An Cheng Huang, Liang-Yo Chen, Kun-Tzu Chen, Nai-Hsi Hu
  • Publication number: 20230378145
    Abstract: Disclosed is a flip-chip packaged power transistor module having a built-in gate driver, for outputting a high-power signal of at least tens of amperes, the module including at least one power transistor die which has an active side where at least one source pin, at least one drain pin and at least one gate pin are exposed; a ceramic substrate body which has a conducting junction side and a heat spreading side, a minimal spacing of the gate bonding pad from at least one of the source bonding pad or the drain bonding pad being less than 500 ?m, whereby parasitic inductance generated therebetween is reduced; at least one gate driver which has at least one gate pin configured to be soldered to the gate bonding pad, and at least one gate drive pin which corresponds to the gate pin and is configured to be soldered to the drive bonding pad.
    Type: Application
    Filed: May 15, 2023
    Publication date: November 23, 2023
    Inventors: HO-CHIEH YU, CHEN-CHENG-LUNG LIAO, CHUN-YU LIN, JASON AN CHENG HUANG, CHIH-CHUAN LIANG, KUN-TZU CHEN, NAI-HIS HU
  • Publication number: 20230215789
    Abstract: A low parasitic inductance power module featuring staggered interleaving conductive members, including: at least one base extending in a length direction; a substrate on which at least one input bus bar and at least one output bus bar are provided; a first unit including a first circuit base portion disposed on the base in a width direction, a plurality of first power devices being disposed on the first circuit base portion, each first power device having a first current input end and a first current output end which are parallel connected, the first current input end or the first current output end being conducted to the first circuit base portion; and a second unit. The units are serially-connected to the bus bars via input conductive members and output conductive members arrayed in a staggered interleaving mode, whereby to create individual inductances counteracting with each other, reducing overall parasitic inductance.
    Type: Application
    Filed: August 19, 2022
    Publication date: July 6, 2023
    Inventors: Jason An Cheng HUANG, Kun-Tzu CHEN, Liang-Yo CHEN, Nai-His HU, Siao-Deng HUANG
  • Patent number: 11043911
    Abstract: A motor control device with built-in shunt resistor and power transistor is disclosed, comprising a high-thermally conductive substrate; an electrically conductive circuit which is thermo-conductively installed on the high-thermally conductive substrate and includes a first thermal connection pad portion and a second thermal connection pad portion mutually spaced apart; a high power transistor conductively connected to the electrical conducive circuit; and a shunt resistor conductively connected to the high power transistor, respectively including a body whose thermal expansion coefficient is greater than that of the high-thermally conductive substrate, as well as a pair of welding portions extending from the body, in which the body has a prescribed width, and the width of the welding portion is greater than the prescribed width, and the body and the high-thermally conductive substrate are spaced apart such that, upon welding the welding portion to the first thermal connection pad portion and the second therm
    Type: Grant
    Filed: November 22, 2019
    Date of Patent: June 22, 2021
    Assignees: ICP Technology Co., Ltd., Sentec E&E Co., Ltd.
    Inventors: Ho-Chieh Yu, Chen-Cheng-Lung Liao, Chun-Yu Lin, Jason An Cheng Huang
  • Publication number: 20200186067
    Abstract: A motor control device with built-in shunt resistor and power transistor is disclosed, comprising a high-thermally conductive substrate; an electrically conductive circuit which is thermo-conductively installed on the high-thermally conductive substrate and includes a first thermal connection pad portion and a second thermal connection pad portion mutually spaced apart; a high power transistor conductively connected to the electrical conducive circuit; and a shunt resistor conductively connected to the high power transistor, respectively including a body whose thermal expansion coefficient is greater than that of the high-thermally conductive substrate, as well as a pair of welding portions extending from the body, in which the body has a prescribed width, and the width of the welding portion is greater than the prescribed width, and the body and the high-thermally conductive substrate are spaced apart such that, upon welding the welding portion to the first thermal connection pad portion and the second therm
    Type: Application
    Filed: November 22, 2019
    Publication date: June 11, 2020
    Inventors: Ho-Chieh Yu, Chen-Cheng-Lung Liao, Chun-Yu Lin, Jason An Cheng Huang
  • Patent number: 10524349
    Abstract: A printed circuit board with built-in vertical heat dissipation ceramic block, and an electrical assembly are disclosed. The electrical assembly includes the board and a plurality of electronic components. The printed circuit boards includes a dielectric material layer defining at least one through hole, at least one ceramic block corresponding to the through hole, at least one fixing portion for joining the ceramic block to the through hole of the dielectric material layer, a metal circuit layer provided on upper surfaces of the dielectric material layer and the ceramic block, and a high thermal conductivity layer provided on lower surfaces of the dielectric material layer and the ceramic block. The printed circuit board allows the location and size of the ceramic block to be modified according to requirements, so as to implement complicated circuit designs, achieve good effect of thermal conduction, control thermal conduction path, and reduce manufacturing cost.
    Type: Grant
    Filed: June 1, 2018
    Date of Patent: December 31, 2019
    Assignees: ICP Technology Co., Ltd., Xiamen Sentecee E&E Co., Ltd.
    Inventors: Ho-Chieh Yu, Cheng-Lung Liao, Chun-Yu Lin, Jason An-Cheng Huang
  • Patent number: 10323851
    Abstract: A UV tube for killing microorganisms in a fluid generally includes a hollow tubular body, a UV isolation layer, and at least one UV light source. The hollow tubular body has an inlet port, an outlet port, and a fluid channel portion between the inlet port and the outlet port. The fluid channel portion has an inner surface. The UV isolation layer is disposed at the inner surface of the hollow tubular body for sheltering the inner surface of the hollow tubular body. The fluid is allowed to flow through the UV isolation layer. The UV light source is provided at the hollow tubular body and/or the UV isolation layer. The UV isolation layer can absorb and/or reflect the ultraviolet light emitting from the UV light source, so that the possibility of the fluid channel portion being irradiated by the UV light can be reduced.
    Type: Grant
    Filed: December 22, 2017
    Date of Patent: June 18, 2019
    Assignee: Sentec E&E Co., Ltd.
    Inventors: Jason An-Cheng Huang, Tzu-Chi Cheng
  • Publication number: 20190049129
    Abstract: A UV tube for killing microorganisms in a fluid generally includes a hollow tubular body, a UV isolation layer, and at least one UV light source. The hollow tubular body has an inlet port, an outlet port, and a fluid channel portion between the inlet port and the outlet port. The fluid channel portion has an inner surface. The UV isolation layer is disposed at the inner surface of the hollow tubular body for sheltering the inner surface of the hollow tubular body. The fluid is allowed to flow through the UV isolation layer. The UV light source is provided at the hollow tubular body and/or the UV isolation layer. The UV isolation layer can absorb and/or reflect the ultraviolet light emitting from the UV light source, so that the possibility of the fluid channel portion being irradiated by the UV light can be reduced.
    Type: Application
    Filed: December 22, 2017
    Publication date: February 14, 2019
    Inventors: Jason An-Cheng Huang, Tzu-Chi Cheng
  • Publication number: 20180352646
    Abstract: A printed circuit board with built-in vertical heat dissipation ceramic block, and an electrical assembly are disclosed. The electrical assembly includes the board and a plurality of electronic components. The printed circuit boards includes a dielectric material layer defining at least one through hole, at least one ceramic block corresponding to the through hole, at least one fixing portion for joining the ceramic block to the through hole of the dielectric material layer, a metal circuit layer provided on upper surfaces of the dielectric material layer and the ceramic block, and a high thermal conductivity layer provided on lower surfaces of the dielectric material layer and the ceramic block. The printed circuit board allows the location and size of the ceramic block to be modified according to requirements, so as to implement complicated circuit designs, achieve good effect of thermal conduction, control thermal conduction path, and reduce manufacturing cost.
    Type: Application
    Filed: June 1, 2018
    Publication date: December 6, 2018
    Inventors: Ho-Chieh Yu, Cheng-Lung Liao, Chun-Yu Lin, Jason An-Cheng Huang