Patents by Inventor Jason Appell

Jason Appell has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11798982
    Abstract: Methods may include providing a device structure including a well formed in an epitaxial layer, and forming a plurality of shielding layers in the device structure, wherein at least one shielding layer is formed between a pair of adjacent sacrificial gates of a plurality of sacrificial gates. The method may further include forming a contact over the at least one shielding layer, forming a fill layer over the contact, and forming a plurality of trenches into the device structure, wherein at least one trench of the plurality of trenches is formed between a pair of adjacent shielding layers of the plurality of shielding layers, and wherein the at least one trench of the plurality of trenches is defined in part by a sidewall of the fill layer. The method may further include forming a gate structure within the at least one trench of the plurality of trenches.
    Type: Grant
    Filed: April 23, 2021
    Date of Patent: October 24, 2023
    Assignee: Applied Materials, Inc.
    Inventors: Qintao Zhang, Samphy Hong, Jason Appell, David J. Lee
  • Publication number: 20230066610
    Abstract: Methods of semiconductor processing may include contacting a substrate with a first slurry and a first platen. The substrate may include silicon oxide defining one or more features, a liner extending across the silicon oxide and within the one or more features, and a copper-containing layer deposited on the liner and extending within the one or more features. The first slurry and the first platen may remove a first portion of the copper-containing layer. The methods may include contacting the substrate with a second slurry and a second platen, which may remove at least a portion of the liner. The methods may include contacting the substrate with a third slurry and a third platen, which may remove a second portion of the copper-containing layer. The methods may include contacting the substrate with a fourth slurry and a fourth platen, which may remove at least a portion of the silicon oxide.
    Type: Application
    Filed: August 25, 2021
    Publication date: March 2, 2023
    Applicant: Applied Materials, Inc.
    Inventors: Tyler Sherwood, Joseph F. Salfelder, Ki Cheol Ahn, Kai Ma, Raghav Sreenivasan, Jason Appell
  • Publication number: 20220344453
    Abstract: Methods may include providing a device structure including a well formed in an epitaxial layer, and forming a plurality of shielding layers in the device structure, wherein at least one shielding layer is formed between a pair of adjacent sacrificial gates of a plurality of sacrificial gates. The method may further include forming a contact over the at least one shielding layer, forming a fill layer over the contact, and forming a plurality of trenches into the device structure, wherein at least one trench of the plurality of trenches is formed between a pair of adjacent shielding layers of the plurality of shielding layers, and wherein the at least one trench of the plurality of trenches is defined in part by a sidewall of the fill layer. The method may further include forming a gate structure within the at least one trench of the plurality of trenches.
    Type: Application
    Filed: April 23, 2021
    Publication date: October 27, 2022
    Applicant: Applied Materials, Inc.
    Inventors: Qintao Zhang, Samphy Hong, Jason Appell, David J. Lee
  • Patent number: 11437488
    Abstract: Disclosed herein are methods for forming split-gate MOSFETs including a gate shield. In some embodiments, a method may include providing a device structure including a well formed in an epitaxial layer, forming a set of trenches through the well and the epitaxial layer, implanting the device structure to form a gate shield layer at a bottom of each of the set of trenches, and forming a gate spacer layer over the device structure including within the set of trenches.
    Type: Grant
    Filed: November 24, 2020
    Date of Patent: September 6, 2022
    Assignee: Applied Materials, Inc.
    Inventors: Qintao Zhang, Samphy Hong, David J. Lee, Jason Appell
  • Publication number: 20220165863
    Abstract: Disclosed herein are methods for forming split-gate MOSFETs including a gate shield. In some embodiments, a method may include providing a device structure including a well formed in an epitaxial layer, forming a set of trenches through the well and the epitaxial layer, implanting the device structure to form a gate shield layer at a bottom of each of the set of trenches, and forming a gate spacer layer over the device structure including within the set of trenches.
    Type: Application
    Filed: November 24, 2020
    Publication date: May 26, 2022
    Applicant: Applied Materials, Inc.
    Inventors: Qintao Zhang, Samphy Hong, David J. Lee, Jason Appell