Patents by Inventor Jason B. E. Julyan

Jason B. E. Julyan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6081561
    Abstract: A method and apparatus for receiving and reconstitution an input digital data signal representing a sequence of values. The input data signal is oversampled at a plurality of times during each of the values. These samples are stored storing in a known order in a sequence of latches as they are received. The sequences of latches stores the samples corresponding to each of the values. The difference in phase between the input digital data signal and a reference signal forms a digital phase signal. This digital phase signal is decoding, preferably by detecting adjacent digital phase signals in the sequence that differ. The location within the sequence of latches corresponding to an edge in the waveform of the input digital data signal is detected. The method and apparatus, selects on of the samples of the waveform from a regions remote from the detected edges.
    Type: Grant
    Filed: February 25, 1994
    Date of Patent: June 27, 2000
    Assignee: Texas Instruments Incorporated
    Inventors: Jason B. E. Julyan, Stephen J. Hubbins
  • Patent number: 5974097
    Abstract: A method and apparatus for receiving an input digital data signal representing a sequence of values in which samples of the waveform of the data signal are taken a plurality of times during each of the values. A plurality of the samples are stored as they are received, in a known order in locations at a sequence of addresses in a memory. A digital signal representing the difference in phase between the input data signal and a reference signal is derived. The digital phase signal is decoded and the location at the address of the memory represented by the digital phase signal is accessed so as to select samples remote from edges in the waveform of the input data signal.
    Type: Grant
    Filed: June 10, 1997
    Date of Patent: October 26, 1999
    Assignee: Texas Instruments Incorporated
    Inventors: Jason B. E. Julyan, Stephen J. Hubbins
  • Patent number: 5809249
    Abstract: A method and system are provided for enabling an auto-negotiaton enabled physcal media dependent (NWAY PMD) interface device (50), to perform auto-negotiation on behalf of itself and at least one other physical media dependent (PMD) interface device (46). The NWAY PMD interface device (50) and the other PMD interface services (46) are connected to a remote link partner PMD interface device (42), also auto-negotiation enabled, through a communications medium (44). A management entity (ME) (48) provides signals to the NWAY PMD interface device (50) indicating the capabilities available on the other PMD interface devices (46). The NWAY PMD interface device (50) advertises these capabilities to the remote link partner PMD interface device (42) as part of the auto-negotiation process. During the auto-negotiation process, the ME (48) also informs the NWAY PMD interface device (50) of the link status of the other PMD interface devices (46).
    Type: Grant
    Filed: March 1, 1996
    Date of Patent: September 15, 1998
    Assignee: Texas Instruments Incorporated
    Inventor: Jason B. E. Julyan
  • Patent number: 5790610
    Abstract: The present invention relates to a data communication system (12) which includes a receiver (14) capable of receiving serially transmitted signals and generates a receiver enabled signal and received data signal in response. A phase locked loop (16) generates a recovered clock signal in response to the received data signal and a first circuit (20) generates digitized data symbols in response to received data signals and the recovered clock signal. A nibble packetizer (28) forms data packets from the digitized data symbols and synchronizes transmission of the data packets in response to the receiver enabled signal, the digitized data symbols and the recovererd clock signal.
    Type: Grant
    Filed: March 15, 1996
    Date of Patent: August 4, 1998
    Assignee: Texas Instruments Incorporated
    Inventor: Jason B. E. Julyan
  • Patent number: 5553103
    Abstract: A digital filter circuit includes a first input for samples of a digital signal, a subtractor, an adder and a first clocked register connected in series. The first input of the circuit is connected to the minuend input of the subtractor and the output of the first clocked register is connected to the subtrahend input of the subtractor. The second clocked register connected in series at a position between the output of the subtractor and a first input of the adder stores the difference from the subtractor or a value proportional to it. A third clocked register latches the value in the first clocked register and supplies it as a second input to the adder. The filtered output is taken from the first or third register. The circuit optionally includes a scaler connected in series between the output of the subtractor and the first input of the adder. The scaler optionally operates by shifting the digits to positions of less significance.
    Type: Grant
    Filed: June 7, 1995
    Date of Patent: September 3, 1996
    Assignee: Texas Instruments Incorporated
    Inventors: Jason B. E. Julyan, Stephen J. Hubbins