Abstract: Systems and methods are disclosed for magnetoresistive asymmetry (MRA) compensation using a digital compensation scheme. In certain embodiments, a method may comprise receiving an analog signal at a continuous-time front end circuit, and performing analog offset compensation to constrain the extrema of the analog signal to adjust a dynamic range based on an input range of an analog-to-digital converter (ADC), rather than to modify the analog signal to have a zero mean. The method may further comprise converting the analog signal to a digital sample sequence via the ADC; performing, via a digital MRA compensation circuit, digital MRA compensation on the digital sample sequence; receiving, via a digital backend (DBE) subsystem, the digital sample sequence prior to digital MRA compensation; and generating, via a DBE, a bit sequence corresponding to the analog signal based on an output of the DBE subsystem and an output of the digital MRA compensation circuit.

Abstract: A cyclo-stationary characteristic of a communications channel and/or storage media is determined. The cyclo-stationary characteristic has K-cycles, K>1. Markov transition probabilities are determined that depend on a discrete phase ?=t mod K, wherein t is a discrete time value. An encoder to optimize the Markov transition probabilities for encoding data sent through the communications channel and/or stored on the storage media. The optimized Markov transition probabilities are used to decode the data from the communication channel and/or read from the storage media.

Abstract: Systems and methods are disclosed for magnetoresistive asymmetry compensation using a hybrid analog and digital compensation scheme. In certain embodiments, a method may comprise receiving an analog signal at a continuous-time front end (CTFE) circuit, and performing, via the CTFE circuit, first magnetoresistive asymmetry (MRA) compensation on the analog signal to adjust the dynamic range of the analog signal based on an input range of an analog-to-digital converter (ADC). The method may further comprise converting the analog signal to a digital sample sequence via the ADC, and performing, via a digital MRA compensation circuit, second MRA compensation to correct residual MRA in the digital sample sequence. Offset compensation may also be performed in both the analog and digital domains.

Abstract: An error recovery process provides for selecting a first recovery scheme for a decoding attempt on a first subset of a set of failed data blocks read from a data track; selecting a second different recovery scheme for a decoding attempt on a second subset of the set of failed data blocks read from the data track; and during a single revolution of the data track, performing operations to decode a first subset of the failed data blocks according to the first recovery scheme operations to decode the second subset of the failed data blocks according to the second different recovery scheme.

Abstract: Systems and methods are disclosed for an improved utilization of parity within a data storage device, and manufacturing methods thereof. In some embodiments, a data storage device can implement an improved codeword redundancy process that can be utilized for data storage locations which were not previously scanned for defects. In some embodiments, a data storage device can implement an improved codeword redundancy process to store write data to a data storage location without having to perform a read operation prior to storing the write data to the storage location. The improved codeword redundancy process can include various methods of storing or updating an outer code codeword for the data to be stored.

Abstract: A method includes encoding a sector of data to be written to a data storage device with a single error correcting code (ECC). The sector of data is divided into N individually readable and writeable portions, with N?2. The individually readable and writeable portions of the sector of data are separated with a space between the portions of the sector of data in a pattern.

Abstract: Systems and methods are disclosed for synchronous writing of a grain patterned medium. The systems and methods can be implemented within a data storage device having a grain patterned medium. Further, a calibration process to determine a count of bits between servo wedges can be implemented in manufacturing, within the data storage device, or both. In some examples, the data storage device, during operation, can utilize the count of bits to perform synchronous writing, determine write errors, or both. Further, the servo wedge of the grain patterned medium may be patterned with a same or similar grain pattern as the data area that follows the servo wedge. Such a data storage device can implement a single clock for reading a servo wedge and writing a data area.

Abstract: Systems and methods are disclosed for phase locking of a clock. In some embodiments, a phase locked clock (PLC) module can phase-lock a write clock to a media written with multiple servo zones of different frequencies. In some implementations, this can be utilized to perform a self-servo write (SSW) of a disc surface within a hard disc drive (HDD). A PLC module can perform a method of writing with a single frequency phase coherently while a read element passes over servo zones with different frequencies. While the PLC module can perform such methods for a SSW process, the methods can also be utilized for other applications that can benefit from writing with a single frequency phase coherently based on servo zones with different frequencies.

Abstract: Systems and methods are disclosed for performing segmentation and labeling of signals generated by single molecule sequencing. In certain embodiments, a method may comprise receiving a training signal generated by molecular detection, segmenting the training signal into a set of events, determining signal characteristics for the set of events, generating a Hidden Markov Model (HMM) based on the set of events and the signal characteristics. The HMM may also be applied to a second signal and may responsively segment the second signal into a second set of events and label the second set of events based on the signal characteristics. A labeled sequence signal output may be provided that includes the second set of events and corresponding labels generated by the HMM.

Abstract: Systems and methods are disclosed for phase locking of a clock. In some embodiments, a phase locked clock (PLC) module can phase-lock a write clock to a media written with multiple servo zones of different frequencies. In some implementations, this can be utilized to perform a self-servo write (SSW) of a disc surface within a hard disc drive (HDD). A PLC module can perform a method of writing with a single frequency phase coherently while a read element passes over servo zones with different frequencies. While the PLC module can perform such methods for a SSW process, the methods can also be utilized for other applications that can benefit from writing with a single frequency phase coherently based on servo zones with different frequencies.

Abstract: A one-shot state transition decoder receives a codeword having N-bits. The decoder reads a first D-bits of the codeword to determine a stitching location d within the codeword. The stitching location identifies a start bit of unencoded data in the codeword. The codeword is decoded into an output buffer for user data of L bits, where N>L. Parameters of the decoder are set before the decoding, including setting a length of the codeword to N?L+d and a number of expected decoded bits to d. The decoding including decoding the d bits based on a set of state transition probabilities and copying decoded bits into the output buffer, the unencoded data being copied to the end of the output buffer.

Abstract: Systems and methods are disclosed for magnetoresistive asymmetry (MRA) compensation using a digital compensation scheme. In certain embodiments, a method may comprise receiving an analog signal at a continuous-time front end (CTFE) circuit, and performing analog offset compensation to constrain an extremum of the analog signal to adjust a dynamic range based on an input range of an analog-to-digital converter (ADC), rather than to modify the analog signal to have a zero mean. The method may further comprise converting the analog signal to a digital sample sequence via the ADC; performing, via a digital MRA compensation circuit, digital MRA compensation on the digital sample sequence; receiving, via a digital backend (DBE) subsystem, the digital sample sequence prior to digital MRA compensation; and generating, via a DBE, a bit sequence corresponding to the analog signal based on an output of the DBE subsystem and an output of the digital MRA compensation circuit.

Abstract: Systems and methods are disclosed for an improved utilization of parity within a data storage device, and manufacturing methods thereof. In some embodiments, a data storage device can implement an improved codeword redundancy process that can be utilized for data storage locations which were not previously scanned for defects. In some embodiments, a data storage device can implement an improved codeword redundancy process to store write data to a data storage location without having to perform a read operation prior to storing the write data to the storage location. The improved codeword redundancy process can include various methods of storing or updating an outer code codeword for the data to be stored.

Abstract: Components are extracted from user data being read from a reader of a hard disk drive. The components collectively indicate both a magnitude and direction of a read offset of the reader over a track. The components are input to a machine-learning processor during operation of the hard disk drive, causing the machine-learning processor to produce an output. A read offset of the reader is estimated during the operation of the hard drive head based on the output of the machine learning processor. While reading the user data, a radial position of the reader over the track is adjusted via an actuator based on the estimated read offset.

Abstract: Two or more data values are received from one or more sensors of a hard disk drive. The two or more data values are indicative of a fly height of a recording head of the hard disk drive. The two or more data values are input into a machine-learning processor during operation of the hard disk drive. A fly height of the recording head during the operation of the hard drive head is adjusted based on an output of the machine learning processor.

Abstract: A cyclo-stationary characteristic of a communications channel and/or storage media is determined. The cyclo-stationary characteristic has K-cycles, K > 1. Markov transition probabilities are determined that depend on a discrete phase ?=t mod K, wherein t is a discrete time value. An encoder to optimize the Markov transition probabilities for encoding data sent through the communications channel and/or stored on the storage media. The optimized Markov transition probabilities are used to decode the data from the communication channel and/or read from the storage media.

Abstract: Two or more data values are received from one or more sensors of a hard disk drive. The two or more data values are indicative of a fly height of a recording head of the hard disk drive. The two or more data values are input into a machine-learning processor during operation of the hard disk drive.

Abstract: Components are extracted from user data being read from a reader of a hard disk drive. The components collectively indicate both a magnitude and direction of a read offset of the reader over a track. The components are input to a machine-learning processor during operation of the hard disk drive, causing the machine-learning processor to produce an output. A read offset of the reader is estimated during the operation of the hard drive head based on the output of the machine learning processor. While reading the user data, a radial position of the reader over the track is adjusted via an actuator based on the estimated read offset.

Abstract: A method includes determining an error after attempting to read, via a first read transducer and a second read transducer, a data sector in a first data track. The method further includes calculating a weight ratio associated with the data sector and determining a read offset direction of the data sector based, at least in part, on the calculated weight ratio.

Abstract: An integrated circuit includes a read/write channel and a servo controller. The read/write channel is configured to: determine, in connection with a first path, respective read errors associated with N number of the data sectors; estimate respective offset positions of the N number of the data sectors; and generate a second path based, at least in part, on the respective estimated offset positions. The servo controller is configured to cause adjustment of a position of a read transducer based on the second path.