Patents by Inventor Jason C. Pierce

Jason C. Pierce has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7031463
    Abstract: A circuit provides current from a high voltage output to a low voltage output through a resistor when a load at the low voltage output is removed. The resistor provides current to keep the VBL voltage above the set point of a switching regulator that provides output power to the VBL output. Accordingly, the regulator's output stage provides a switched 0% duty cycle output and saves power until a load is presented again. Presenting a signal to either a shutdown circuit or a sleep pin shuts down the entire controller until a load is presented again. A zener diode is used to clamp the VBL at a voltage higher than the set point of the controller to ensure that the controller operates with a 0% duty cycle output while in a no-load condition. The circuitry can be configured to operate in either a positive or negative powering scheme.
    Type: Grant
    Filed: February 13, 2004
    Date of Patent: April 18, 2006
    Assignee: Arris International, Inc.
    Inventor: Jason C. Pierce
  • Publication number: 20040161103
    Abstract: A circuit provides current from a high voltage output to a low voltage output through a resistor when a load at the low voltage output is removed. The resistor provides current to keep the VBL voltage above the set point of a switching regulator that provides output power to the VBL output. Accordingly, the regulator's output stage provides a switched 0% duty cycle output and saves power until a load is presented again. Presenting a signal to either a shutdown circuit or a sleep pin shuts down the entire controller until a load is presented again. A zener diode is used to clamp the VBL at a voltage higher than the set point of the controller to ensure that the controller operates with a 0% duty cycle output while in a no-load condition. The circuitry can be configured to operate in either a positive or negative powering scheme.
    Type: Application
    Filed: February 13, 2004
    Publication date: August 19, 2004
    Inventor: Jason C. Pierce