Patents by Inventor Jason CARROLL

Jason CARROLL has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240104487
    Abstract: One example method includes receiving information for a shipment, the shipment comprising one or more pieces, the information comprising information about a destination; receiving, from a remote dimensioning device, dimension information, the dimension information providing a length, a width, and a height for each of the one or more pieces; transporting, using one or more first transport vehicles, the shipment to a first shipper facility; allocating, using a first trained machine learning (“ML”) model and the dimension information, each piece of the shipment to one or more second transport vehicles and loading each piece of the shipment according to the allocating, wherein the first trained ML model is trained based on length, width, and height dimension information for one or more pieces; transporting, using the one or more second transport vehicles, the shipment to a second shipper facility; allocating, using a second trained machine learning (“ML”) model and using the dimension information, each piece of t
    Type: Application
    Filed: March 18, 2022
    Publication date: March 28, 2024
    Inventors: Matthew Carroll, Christopher Callahan, Jason Silberkleit
  • Patent number: 11931233
    Abstract: An absorbent article includes a first waist region, a second waist region, and a crotch region disposed between the first and second waist regions; and a chassis having a topsheet, a backsheet, and an absorbent core positioned between the topsheet and the backsheet. The article also includes a side panel having an ultrasonically bonded, gathered laminate. The laminate has an elastomeric layer and a substrate and is joined to the chassis at a chassis attachment bond and positioned in one of the first or second waist regions. The ultrasonically bonded, gathered laminate also includes an ear structural feature comprising a surface modification to the substrate and comprising at least one of the following: embossing, apertures, perforations, slits, melted material or coatings, compressed material, secondary bonds that are disposed apart from a chassis attachment bond, plastic deformation, and folds.
    Type: Grant
    Filed: May 4, 2021
    Date of Patent: March 19, 2024
    Assignee: The Procter & Gamble Company
    Inventors: Sally Lin Kilbacak, Donald Carroll Roe, Jeromy Thomas Raycheck, Uwe Schneider, Michael Devin Long, Michael Brian Quade, Jason Edward Naylor, Jeffry Rosiak, Stephen Joseph Lange, Urmish Popatlal Dalal, Christopher Krasen, Todd Douglas Lenser
  • Publication number: 20220337070
    Abstract: A method includes interpreting a contactor open event and a contactor load value for a contactor positioned on a motive power circuit for a mobile application, determining that a contactor opening event under load has occurred in response to the contactor open event and the contactor load value, and updating a contactor wear condition in response to the contactor opening event under load, wherein updating the contactor wear condition comprises accumulating a number of the contactor opening events under load.
    Type: Application
    Filed: May 5, 2022
    Publication date: October 20, 2022
    Inventors: Justin Keith Griffiths, Nilesh Surase, Ritika Shetty, Shalini Tripathy, Somdut Dey, Madhavi Gupta, Mayura Madane, Sadiya Qureshi, Toseed Khan, Amit Chavan, Kumar Prasad Telikepalli, Atul Solvande, Hao Wang, Jiong Chen, Yueyue Deng, Jason Carroll, Srinivasan Arjun Tekalur, Jacob William Green, Ashok Chakravarthi Kandru, Cheng Luo, Tianyang Jiang, Cheng Wan, Ye Zhu, John Trublowski, Robert Stephen Douglass, Rajen Modi, Nilay Mehta, Laura Natali Valencia Fritsch, Han Li, Dongxin JIn, Lewei Qian, Jun Li, Hongrae Kim, Daniel R. Ouwenga, Patrick Herranz, Miroslav Horejs, Rohit Baranwal, Zhe Zhang, Martin Wayne Mensch, Brandon William Fisher, Austin Robert Zurface, Jeff Howard Urian, James David, Bharath Kumar Suda, Asheesh Kumar Soni, Rene Guy Gallet, Michael Scott Sullivan, Karsten Gerving, Guido Völlmar, Gerd Schmitz, Christoph Bausch, Ute Molitor, Lutz Friedrichsen, Kai Schroeder, Julia Otte, Madeline Philipsohn, Norbert Roesner, Volker Lang, Johannes Meissner, Paolo D'Amico, Jalpa Shah, Meng Wang, Damrongrit Piyabongkarn, Niles Stephen Ramseyer, Dennis Dukaric, Matt Haylock, Anvaya R. Hingangave, Devendra Patil
  • Publication number: 20200274375
    Abstract: A power electronics assembly for a mobile application includes a first power electronics component selectively coupled to a high source on a first side and coupled to a high voltage battery on a second side, a second power electronics component selectively coupled to one of a low load or a low voltage battery on a first side and coupled to the high voltage battery on a second side; and a controller, including an operating mode circuit structured to determine a discharge operating mode for the mobile application, a power electronics configuration circuit structured to provide a switch state value for the first power electronics component and the second power electronics component in response to the discharge operating mode, and wherein the first power electronics component and the second power electronics component are responsive to the switch state value to coupled selected ones of the high source, low load, and low voltage battery to the high voltage battery.
    Type: Application
    Filed: March 23, 2020
    Publication date: August 27, 2020
    Inventors: Justin Keith Griffiths, Nilesh Surase, Ritika Shetty, Shalini Tripathy, Somdut Dey, Madhavi Gupta, Mayura Madane, Sadiya Qureshi, Toseed Khan, Amit Chavan, Kumar Prasad Telikepalli, Atul Solvande, Hao Wang, Jiong Chen, Yueyue Deng, Jason Carroll, Srinivasan Arjun Tekalur, Jacob William Green, Chakravarthi Kandru, Cheng Luo, Tianyang Jiang, Cheng Wan, Ye Zhu, John Trublowski, Robert Stephen Douglass, Rajen Modi, Nilay Mehta, Laura Natali Valencia Fritsch, Han Li, Dongxin Jin, Lewei Qian, Jun Li, Hongrae Kim, Daniel R. Ouwenga, Patrick Herranz, Miroslav Horejs, Rohit Baranwal, Zhe Zhang, Martin Wayne Mensch, Brandon William Fisher, Austin Robert Zurface, Jeff Howard Urian, James David, Bharath Kumar Suda, Asheesh Kumar Soni, Rene Guy Gallet, Michael Scott Sullivan, Karsten Gerving, Guido Völlmar, Gerd Schmitz, Christoph Bausch, Ute Molitor, Lutz Friedrichsen, Kai Schroeder, Julia Otte, Madeline Philipsohn, Norbert Roesner, Volker Lang, Johannes Meissner, Paolo D'Amico, Jalpa Shah, Meng Wang, Damrongrit Piyabongkarn, Niles Stephen Ramseyer, Dennis Dukaric, Matt Haylock, Anvaya R. Hingangave, Devendra Patil
  • Patent number: 9123153
    Abstract: Disclosed herein is a vertex core. The vertex core includes a reset scanner configured to remove reset indices and partial primitives in an input stream and resolve draw calls into sub-draw calls at reset index boundaries; and provide the resolved sub-draw calls to a plurality of downstream vertex grouper tessellators.
    Type: Grant
    Filed: May 22, 2012
    Date of Patent: September 1, 2015
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Jason Carroll, Vineet Goel, Mangesh Nijasure, Todd E. Martin
  • Patent number: 9105125
    Abstract: A system, method and a computer-readable medium for load balancing patch processing pre-tessellation are provided. The patches for drawing objects on a display screen are distributed to shader engines for parallel processing. Each shader engine generates tessellation factors for a patch, wherein a value of generated tessellation factors for the patch is unknown prior to distribution. The patches are redistributed to the shader engines pre-tessellation to load balance the shader engines for processing the patches based on the value of tessellation factors in each patch.
    Type: Grant
    Filed: December 5, 2012
    Date of Patent: August 11, 2015
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Todd E. Martin, Mangesh Nijasure, Jason Carroll, Randy W. Ramsey, Brian A. Buchner
  • Patent number: 8928679
    Abstract: A system, method and a computer program product are provided for distributing prim groups for parallel processing in a single clock cycle. A work distributor divides a draw call for primitive processing into a plurality of prim groups according to a prim group size. The work distributor then distributes the plurality of prim groups to a plurality of shader engines for parallel processing of the plurality of prim groups during a clock cycle. The size of a prim group and a number of prim groups are scaled to the plurality of shader engines.
    Type: Grant
    Filed: September 14, 2012
    Date of Patent: January 6, 2015
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Jason Carroll, Vineet Goel, Mangesh Nijasure, Todd E. Martin
  • Publication number: 20140152675
    Abstract: A system, method and a computer-readable medium for load balancing patch processing pre-tessellation are provided. The patches for drawing objects on a display screen are distributed to shader engines for parallel processing. Each shader engine generates tessellation factors for a patch, wherein a value of generated tessellation factors for the patch is unknown prior to distribution. The patches are redistributed to the shader engines pre-tessellation to load balance the shader engines for processing the patches based on the value of tessellation factors in each patch.
    Type: Application
    Filed: December 5, 2012
    Publication date: June 5, 2014
    Applicant: Advanced Micro Devices, Inc.
    Inventors: Todd E. MARTIN, Mangesh Nijasure, Jason Carroll, Randy W. Ramsey, Brian A. Buchner
  • Publication number: 20140078156
    Abstract: A system, method and a computer program product are provided for distributing prim groups for parallel processing in a single clock cycle. A work distributor divides a draw call for primitive processing into a plurality of prim groups according to a prim group size. The work distributor then distributes the plurality of prim groups to a plurality of shader engines for parallel processing of the plurality of prim groups during a clock cycle. The size of a prim group and a number of prim groups are scaled to the plurality of shader engines.
    Type: Application
    Filed: September 14, 2012
    Publication date: March 20, 2014
    Applicant: Advanced Micro Devices, Inc.
    Inventors: Jason Carroll, Vineet Goel, Mangesh Nijasure, Todd E. Martin
  • Publication number: 20130169635
    Abstract: Disclosed herein is a vertex core. The vertex core includes a reset scanner configured to remove reset indices and partial primitives in an input stream and resolve draw calls into sub-draw calls at reset index boundaries; and provide the resolved sub-draw calls to a plurality of downstream vertex grouper tessellators.
    Type: Application
    Filed: May 22, 2012
    Publication date: July 4, 2013
    Applicant: Advanced Micro Devices, Inc.
    Inventors: Jason CARROLL, Vineet GOEL, Mangesh NIJASURE, Todd E. MARTIN