Patents by Inventor Jason Caulkins
Jason Caulkins has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20180206053Abstract: A system and method for optimizing spatial audio in virtual 3D spaces installed on a computing appliance is provided, comprising of steps, prior to runtime, automatically or manually laying out a grid of nodes in the 3D space, running an acoustic simulation at each node, recording the results after the simulated sound has interacted with the virtual environment, then, based on the simulation input and output, creating a unique transfer function for each node and node pair, recording the transfer functions to an indexed matrix, and, at runtime, utilizing the transfer function matrix and the relative distances between the audio source(s), the node(s), and the listener(s) to create a singular, instantaneous, weighted transfer function which is then applied to the audio stream to create more realistic audio experience for the listener.Type: ApplicationFiled: January 13, 2017Publication date: July 19, 2018Inventor: Jason Caulkins
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Patent number: 9384137Abstract: A system includes a computerized appliance connected to a network, a processor, a persistent memory, a dynamic random access memory, and software executing on the processor, the software provides for installing an application, storing data to be used in execution of the application, mapping logical block addresses at which particular data is stored to data in an order of expected use, the data-use profile listing an expected order of data use in execution of the application, configuring the DRAM with a cache of a specific data capacity, transferring a block of data equal to the cache size into the cache according to the order of data in the data-use profile, and as data is used in execution of the application, emptying used data from the cache and transferring not-yet-used data from persistent storage into the cache according to the order of data in the data-use profile.Type: GrantFiled: September 18, 2014Date of Patent: July 5, 2016Assignee: DATARAM, Inc.Inventor: Jason Caulkins
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Publication number: 20160147663Abstract: An apparatus includes a computerized appliance having a processor, persistent storage storing one or more executable programs, and Dynamic Random Access Memory (DRAM) accessible by the processor, and caching software (SW) executing on the processor from a non-transitory medium, the SW providing a process: storing Logical Block Address (LBA) tables associated with individual ones of existing programs executable on the processor, tracking program launch and close, managing caching of data for any program launched according to the associated LBA, tracking data usage during execution of any program launched, on closing a program, removing any unused LBAs from the associated LBA table, adding any LBAs accessed not on the table; and saving the resulting LBA table for the program closed.Type: ApplicationFiled: February 1, 2016Publication date: May 26, 2016Applicant: Dataram CorporationInventor: Jason Caulkins
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Patent number: 9250762Abstract: An apparatus includes a computerized appliance having a processor, persistent storage storing one or more executable programs, and Dynamic Random Access Memory (DRAM) accessible by the processor, and caching software (SW) executing on the processor from a non-transitory medium, the SW providing a process: storing Logical Block Address (LBA) tables associated with individual ones of existing programs executable on the processor, tracking program launch and close, managing caching of data for any program launched according to the associated LBA, tracking data usage during execution of any program launched, on closing a program, removing any unused LBAs from the associated LBA table, adding any LBAs accessed not on the table; and saving the resulting LBA table for the program closed.Type: GrantFiled: February 24, 2014Date of Patent: February 2, 2016Assignee: Dataram, Inc.Inventor: Jason Caulkins
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Publication number: 20150242060Abstract: An apparatus includes a computerized appliance having a processor, persistent storage storing one or more executable programs, and Dynamic Random Access Memory (DRAM) accessible by the processor, and caching software (SW) executing on the processor from a non-transitory medium, the SW providing a process: storing Logical Block Address (LBA) tables associated with individual ones of existing programs executable on the processor, tracking program launch and close, managing caching of data for any program launched according to the associated LBA, tracking data usage during execution of any program launched, on closing a program, removing any unused LBAs from the associated LBA table, adding any LBAs accessed not on the table; and saving the resulting LBA table for the program closed.Type: ApplicationFiled: February 24, 2014Publication date: August 27, 2015Inventor: Jason Caulkins
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Publication number: 20150242325Abstract: A system includes a computerized appliance connected to a network, a processor, a persistent memory, a dynamic random access memory, and software executing on the processor, the software provides for installing an application, storing data to be used in execution of the application, mapping logical block addresses at which particular data is stored to data in an order of expected use, the data-use profile listing an expected order of data use in execution of the application, configuring the DRAM with a cache of a specific data capacity, transferring a block of data equal to the cache size into the cache according to the order of data in the data-use profile, and as data is used in execution of the application, emptying used data from the cache and transferring not-yet-used data from persistent storage into the cache according to the order of data in the data-use profile.Type: ApplicationFiled: September 18, 2014Publication date: August 27, 2015Inventor: Jason Caulkins
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Patent number: 9081904Abstract: A method is provided for enabling electronic representation of a removable or fixed data storage device having a non-volatile memory as an operating system-standard disk directly accessible to a main bus of a computing appliance having a peripheral component interface connector and a motherboard. The method includes the acts (a) providing a peripheral component interface ported to a memory controller on the device, the memory controller for controlling host access to the non-volatile memory, (b) providing disk control registers and or bus control registers including appropriate disk and or bus protocols and commands in the peripheral component interface on the device, and (c) connecting the device to the peripheral component interface connector of the computing appliance.Type: GrantFiled: June 18, 2012Date of Patent: July 14, 2015Assignee: SK Hynix Inc.Inventor: Jason Caulkins
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Patent number: 8838903Abstract: A hierarchical data-storage system has a volatile storage medium, a first non-volatile storage medium, and a controller including a ranking engine tracking data writes to each of the memory mediums. Each medium is associated with a pre-set capacity threshold, and the controller, upon the volatile medium reaching its pre-set threshold, identifies one or more blocks of data as least-frequently written to the volatile medium, copies the data in those blocks to the non-volatile medium, and marks those blocks as available for new data writes, and the controller, upon the non-volatile medium reaching its pre-set threshold, identifies one or more blocks of data as least-frequently written to the non-volatile medium, and marks those blocks as available for new data writes from the volatile medium.Type: GrantFiled: February 4, 2010Date of Patent: September 16, 2014Assignee: Dataram, Inc.Inventor: Jason Caulkins
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Publication number: 20140232733Abstract: A method includes searching storage media of a computing appliance for application-specific configuration files by executing a configuration utility from a non-transitory storage medium of the computing appliance, upon finding an application-specific configuration file, directing a graphics processing unit (GPU) driver to partition a portion of GPU random access memory (RAM) as cache, and loading data specified in the configuration file to the cache portion partitioned in the GPU RAM.Type: ApplicationFiled: February 19, 2013Publication date: August 21, 2014Inventor: Jason Caulkins
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Publication number: 20140149650Abstract: A method for optimizing performance of programs has steps for scanning storage mechanisms of the computing appliance by executing a configuration utility by a Central Processing Unit (CPU) of the computing appliance to find and identify installed programs, comparing the determined installed programs to a database (dB) of information and files prepared to optimize performance of specific programs through caching, and determining matches between the installed programs and specific programs having information and files in the dB, selecting installed programs to optimize for performance, partitioning a portion of system RAM of the computing appliance as cache, and loading information and files from local storage mechanisms for each program selected to the cache partitioned in system RAM, enabling the programs selected to at least read data in operation from the cache portion partitioned in system RAM.Type: ApplicationFiled: November 29, 2012Publication date: May 29, 2014Inventor: Jason Caulkins
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Publication number: 20120254525Abstract: A method is provided for enabling electronic representation of a removable or fixed data storage device having a non-volatile memory as an operating system-standard disk directly accessible to a main bus of a computing appliance having a peripheral component interface connector and a motherboard. The method includes the acts (a) providing a peripheral component interface ported to a memory controller on the device, the memory controller for controlling host access to the non-volatile memory, (b) providing disk control registers and or bus control registers including appropriate disk and or bus protocols and commands in the peripheral component interface on the device, and (c) connecting the device to the peripheral component interface connector of the computing appliance.Type: ApplicationFiled: June 18, 2012Publication date: October 4, 2012Inventor: Jason Caulkins
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Patent number: 8239640Abstract: A system for controlling one or more aspects of a data storage and access routine incorporates a filter driver residing on a digital storage medium internal to or accessible to a host computing system; and a configuration interface residing on the digital storage medium. The interface enables reservation of an amount of memory for accelerating processes of data access and data storage and wherein the filter driver monitors data read and data write requests and processes those requests allowed through configuration and according to configured parameters.Type: GrantFiled: October 9, 2008Date of Patent: August 7, 2012Assignee: Dataram, Inc.Inventor: Jason Caulkins
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Patent number: 8225022Abstract: A method is provided for enabling electronic representation of a removable or fixed data storage device having a non-volatile memory as an operating system-standard disk directly accessible to a main bus of a computing appliance having a peripheral component interface connector and a motherboard. The method includes the acts (a) providing a peripheral component interface ported to a memory controller on the device, the memory controller for controlling host access to the non-volatile memory, (b) providing disk control registers and or bus control registers including appropriate disk and or bus protocols and commands in the peripheral component interface on the device, and (c) connecting the device to the peripheral component interface connector of the computing appliance.Type: GrantFiled: August 7, 2007Date of Patent: July 17, 2012Assignee: Dataram, Inc.Inventor: Jason Caulkins
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Patent number: 8086791Abstract: A system interface controller for enabling a computing appliance to read and write data to a fixed or removable non-volatile memory device includes a peripheral component interface having one or more disk and or bus controller registers, a flash memory controller, a random access memory controller, and a random access memory chip having one or more flash address management tables connected to the random access memory controller. In one embodiment, the system interface controller is modular and is installable to a card form factor supporting the non-volatile memory.Type: GrantFiled: August 7, 2007Date of Patent: December 27, 2011Assignee: DataRam, Inc.Inventor: Jason Caulkins
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Patent number: 8086795Abstract: A controller and memory unit for a host computer has a primary controller coupled to a parallel bus interface connectable or connected to the host computer, and by cable connections to one or more remote memory disk units, one or more secondary controllers coupled by parallel bus to the primary controller, and one or more solid-state memory modules coupled by parallel bus one-to-one with the secondary controllers. The primary controller provides read/write access to the remote memory disk units and read/write access to each of the solid-state memory modules through the associated secondary controller.Type: GrantFiled: January 20, 2009Date of Patent: December 27, 2011Assignee: Dataram, Inc.Inventor: Jason Caulkins
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Patent number: 8086816Abstract: A method for improving the performance of a computerized data storage and access system includes the steps (a) providing a virtual representation of an existing data storage controller accessible to a computing system, (b) providing a configuration interface executable by an operator of the computing system, (c) using the configuration interface, reserving an amount available memory for dedicated use as a data cache and or additional storage space for storing data written to one or more disk drives representing data storage disks of the data storage and access system, (d) intercepting read and write requests to the data storage controller from the central processing unit of the computing system via the virtual representation of the controller, and (e) writing data into the reserved memory or serving data from the reserved memory in lieu of accessing a data storage disk represented by the one or more disk drives.Type: GrantFiled: October 20, 2008Date of Patent: December 27, 2011Assignee: Dataram, Inc.Inventor: Jason Caulkins
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Publication number: 20110191523Abstract: A hierarchical data-storage system has a volatile storage medium, a first non-volatile storage medium, and a controller including a ranking engine tracking data writes to each of the memory mediums. Each medium is associated with a pre-set capacity threshold, and the controller, upon the volatile medium reaching its pre-set threshold, identifies one or more blocks of data as least-frequently written to the volatile medium, copies the data in those blocks to the non-volatile medium, and marks those blocks as available for new data writes, and the controller, upon the non-volatile medium reaching its pre-set threshold, identifies one or more blocks of data as least-frequently written to the non-volatile medium, and marks those blocks as available for new data writes from the volatile medium.Type: ApplicationFiled: February 4, 2010Publication date: August 4, 2011Inventor: Jason Caulkins
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Patent number: 7949820Abstract: In a system for reading and writing data, the system including a controller, multiple microprocessor units accessible to the controller, and multiple memory device configurations, each having one dedicated bus connection to individual ones or multiples of the microprocessor units, a method for managing access to one or more of the memory device configurations includes the steps, (a) receiving a request at the controller requiring access of at least one of the memory device configurations, (b) determining at the controller, which microprocessor unit or units will handle the request, (c) handing the request to the selected microprocessor unit or units, (d) determining at the microprocessor unit or units, the tasks specified in the request for that microprocessor unit or units and (e) determining a memory address or addresses in one or more of the memory device configurations and accessing the memory device configuration or configurations to satisfy the request.Type: GrantFiled: May 19, 2008Date of Patent: May 24, 2011Assignee: DataRam, Inc.Inventor: Jason Caulkins
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Patent number: 7930468Abstract: A system for writing and reading data includes a controller accessible to at least one or more computing systems, a plurality of microprocessor units accessible to the controller, and a plurality of memory device configurations each having one dedicated bus connection to individual ones or multiples of the microprocessor units. The controller receives write and read requests from the one or more computing systems and selects which of the plurality of microprocessor units will write or read data associated with the requests.Type: GrantFiled: May 19, 2008Date of Patent: April 19, 2011Assignee: Dataram, Inc.Inventor: Jason Caulkins
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Patent number: 7882320Abstract: A data storage device has a host controller interface, a plurality of microprocessor units each having a portion of random access memory (RAM) dedicated thereto, a plurality of Flash device configurations each having dedicated bus connections to individual ones or multiples of the microprocessor units, and a dataflow controller accessible to the host controller interface for managing access to the Flash device configurations.Type: GrantFiled: May 1, 2008Date of Patent: February 1, 2011Assignee: Dataram, Inc.Inventor: Jason Caulkins