Patents by Inventor Jason Cheng

Jason Cheng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20060130424
    Abstract: A fast disassembling joint structure includes a base part and a removable part. One end of the removable part is secured to a desired structure; the other end is a connection arm. The housing has a raceway and a first semi-circular concavity. The movable clamp has an insertion section to engage a recess of the connection arm. The insertion section has a second semi-circular concavity to fit with the first semi-circular concavity so as to pivotally connect with the connection arm. A spring is adapted to provide a push force for the movable clamp. A top cover, secured on the housing, is employed to house the spring and movable clamp inside. A handle of the movable clamp extends out of an opening of the cover so that users can manually control the handle to disassemble the removable part.
    Type: Application
    Filed: May 9, 2005
    Publication date: June 22, 2006
    Inventors: Cheng-Wang Lin, Chien-Chih Tung, Jason Cheng
  • Publication number: 20060064876
    Abstract: A razor having a base, a ceramic blade installed in the base, a plurality of ceramic rollers installed in the base at two sides of the ceramic blade. The base has a lid having a slit allowing an edge of the blade to extend through and a plurality of openings allowing portions of the rollers to extend through. The rollers are supported by at least one resilient member such that the exposed portions of the rollers can be pressed inwardly for shaving and retrieved to the original height when the pressing force is relieved.
    Type: Application
    Filed: September 30, 2004
    Publication date: March 30, 2006
    Inventors: Richard Lee, Jason Cheng
  • Patent number: 6986004
    Abstract: A memory provides a programmable write port data width and an independently programmable read port data width. The independence between the programmable write port data width and the programmable read port data width is achieved without the use of a third clock domain.
    Type: Grant
    Filed: April 8, 2003
    Date of Patent: January 10, 2006
    Assignee: Lattice Semiconductor Corporation
    Inventors: Chan-Chi Jason Cheng, Bradley Felton, Satwant Singh, Andrew Armitage
  • Patent number: 6903573
    Abstract: A programmable device with logic blocks is configured to cascade product terms from one logic block to another to increase the logical input width of the product terms. Each logic block may produce a plurality of product terms based upon the selection of inputs from a routing structure. Logic blocks configured to receive cascaded product terms includes a plurality of AND gates corresponding to the plurality of product terms.
    Type: Grant
    Filed: July 14, 2003
    Date of Patent: June 7, 2005
    Assignee: Lattice Semiconductor Corporation
    Inventors: Jason Cheng, Cyrus Tsui, Satwant Singh, Albert Chan, Ju Shen, Clement Lee
  • Patent number: 6879182
    Abstract: A programmable device includes a plurality of programmable blocks each associated with a distributed memory block. The programmable blocks may be configured as logic or memory. The addressing circuitry for each distributed memory block may be shared with its associated programmable block or may be separate.
    Type: Grant
    Filed: May 1, 2003
    Date of Patent: April 12, 2005
    Assignee: Lattice Semiconductor Corporation
    Inventors: Om P. Agrawal, Chan-Chi Jason Cheng
  • Patent number: 6861871
    Abstract: Cascadable logic block architectures are disclosed for programmable logic devices, such as for high density and high performance complex programmable logic devices. The logic block architectures provide, for example, clusters or groups of logic blocks that may have cascadable inputs and/or product terms to provide flexible logic width and/or depth capability. The logic block architecture may, for example, be implemented in conjunction with a multi-stage interconnect architecture to provide array fuse density and/or interconnect fuse density savings compared to conventional architectures.
    Type: Grant
    Filed: May 1, 2003
    Date of Patent: March 1, 2005
    Assignee: Lattice Semiconductor Corporation
    Inventors: Om P. Agrawal, Paul R. Bonwick, Chan-Chi Jason Cheng
  • Patent number: 6861870
    Abstract: The fuse points within a programmable AND array may be programmed with configuration signals to select for logical signals to form product term outputs in a logic mode. In a switch mode, a subset of these fuse points may be programmed with dynamically-created operating signals to form a cross point switch matrix.
    Type: Grant
    Filed: February 19, 2003
    Date of Patent: March 1, 2005
    Assignee: Lattice Semiconductor Corporation
    Inventors: Jason Cheng, Satwant Singh
  • Patent number: 6828823
    Abstract: An integrated circuit includes non-volatile and volatile memory, with the volatile memory controlling the integrated circuit's functionality. Various techniques are disclosed for programming the different types of memory through one or more data ports to provide in-system programmability and dynamic reconfigurability. External configuration devices are not required if the data from the non-volatile memory is transferred directly to the volatile memory.
    Type: Grant
    Filed: May 16, 2003
    Date of Patent: December 7, 2004
    Assignee: Lattice Semiconductor Corporation
    Inventors: Cyrus Tsui, Benny Ma, Om P. Agrawal, Ju Shen, Sam Tsai, Jack Wong, Chan-Chi Jason Cheng
  • Patent number: 6765408
    Abstract: A programmable device and method with generic logic blocks. Each generic logic block is configurable to perform product term logic functions and memory functions, such as RAM, dual-port RAM, ROM, CAM, FIFO and switch.
    Type: Grant
    Filed: April 26, 2002
    Date of Patent: July 20, 2004
    Assignee: Lattice Semiconductor Corporation
    Inventors: Jason Cheng, Cyrus Tsui, Satwant Singh, Albert Chen, Ju Shen, Clement Lee
  • Publication number: 20040000928
    Abstract: A programmable device and method with generic logic blocks. Each generic logic block is configurable to perform product term logic functions and memory functions, such as RAM, dual-port RAM, ROM, CAM, FIFO and switch.
    Type: Application
    Filed: April 26, 2002
    Publication date: January 1, 2004
    Applicant: Lattice Semiconductor Corporation
    Inventors: Jason Cheng, Cyrus Tsui, Satwant Singh, Albert Chan, Ju Shen, Clement Lee
  • Patent number: 6349205
    Abstract: A subscriber conversion system determines at least one code for an existing subscriber of a first wireless communications system to be converted to a second wireless communications system. When the existing subscriber obtains a wireless unit to be used in the second wireless communications system, the conversion system uses the at least one code provided to the existing subscriber to link existing subscriber information from the first wireless communications system to information associated with wireless unit for the second communications system, thereby improving the efficiency of the conversion process. For example, if a service provider wishes to convert from GSM to CDMA, the service provider can provide a secret code and an identification number, such as a directory number (DN), as the codes to the existing GSM subscriber. The subscriber obtains a CDMA wireless unit and commences an activation process to activate the CDMA wireless unit.
    Type: Grant
    Filed: April 15, 1999
    Date of Patent: February 19, 2002
    Assignee: Lucent Technologies Inc.
    Inventors: I-Ning Hsu Fang, Peng-Sheng Ku, Jason Cheng Ting, Bee Yun Yu
  • Patent number: 6299373
    Abstract: A ring assembly for a pen has a bottom ring, a top ring, and a slender bridge connecting the bottom ring and the top ring. In assembly, a barrel of the pen extends through the bottom ring and the top ring, so that a sticker adhered around the barrel is securely attached to the barrel by clamping of the top ring and the bottom ring. Furthermore, a gap formed by two conjunct sides of the sticker is concealed by the bridge. By such arrangement, the ring assembly is able to be decorative and to avoid peeling of the sticker from the barrel after long-term use.
    Type: Grant
    Filed: March 19, 2001
    Date of Patent: October 9, 2001
    Assignee: Ding Ares Enterprise Co., Ltd.
    Inventor: Jason Cheng
  • Patent number: 6254295
    Abstract: A dual-purpose pen has a barrel, a cap engaged with the barrel, and a ball point that is extendable from the end of the barrel, and a key-pressing point that is extendable from the end of the cap. The pen can be used for writing when the ball point is extended and for pressing keys when the key-pressing point is extended.
    Type: Grant
    Filed: September 5, 2000
    Date of Patent: July 3, 2001
    Assignee: Ding Ares Enterprise Co., Ltd.
    Inventor: Jason Cheng