Patents by Inventor Jason Chiesa

Jason Chiesa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8509682
    Abstract: A switch element includes a switch device having a drain, a source and a plurality of gates, and at least one additional interconnect located between the plurality of gates, the additional interconnect operative to establish a constant potential between the at least two gates.
    Type: Grant
    Filed: April 2, 2012
    Date of Patent: August 13, 2013
    Assignee: Skyworks Solutions, Inc.
    Inventors: Dima Prikhodko, Jerod F. Mason, Steven P. Matte, John Pessia, Jason Chiesa, Sergey Nabokin, Gene A. Tkachenko, Richard A. Carter, Steven C. Sprinkle, Mikhail Shirokov
  • Publication number: 20120190313
    Abstract: A switch element includes a switch device having a drain, a source and a plurality of gates, and at least one additional interconnect located between the plurality of gates, the additional interconnect operative to establish a constant potential between the at least two gates.
    Type: Application
    Filed: April 2, 2012
    Publication date: July 26, 2012
    Applicant: Skyworks Solutions, Inc.
    Inventors: Dima Prikhodko, Jerod F. Mason, Steven P. Matte, John Pessia, Jason Chiesa, Sergey Nabokin, Gene A. Tkachenko, Richard A. Carter, Steven C. Sprinkle, Mikhail Shirokov
  • Patent number: 8175523
    Abstract: A switch element includes a switch device having a drain, a source and a plurality of gates, and at least one additional interconnect located between the plurality of gates, the additional interconnect operative to establish a constant potential between the at least two gates.
    Type: Grant
    Filed: December 29, 2010
    Date of Patent: May 8, 2012
    Assignee: Skyworks Solutions, Inc.
    Inventors: Dima Prikhodko, Jerod F. Mason, Steven P. Matte, John Pessia, Jason Chiesa, Sergey Nabokin, Gene A. Tkachenko, Richard A. Carter, Steven C. Sprinkle, Mikhail Shirokov
  • Publication number: 20110151776
    Abstract: A switch element includes a switch device having a drain, a source and a plurality of gates, and at least one additional interconnect located between the plurality of gates, the additional interconnect operative to establish a constant potential between the at least two gates.
    Type: Application
    Filed: December 29, 2010
    Publication date: June 23, 2011
    Applicant: SKYWORKS SOLUTIONS, INC.
    Inventors: Dima Prikhodko, Jerod F. Mason, Steven P. Matte, John Pessia, Jason Chiesa, Sergey Nabokin, Gene A. Tkachenko, Richard A. Carter, Steven C. Sprinkle, Mikhail Shirokov
  • Patent number: 7877058
    Abstract: A switch element includes a switch device having a drain, a source and a plurality of gates, and at least one additional interconnect located between the plurality of gates, the additional interconnect operative to establish a constant potential between the at least two gates.
    Type: Grant
    Filed: November 6, 2007
    Date of Patent: January 25, 2011
    Assignee: Skyworks Solutions, Inc.
    Inventors: Dima Prikhodko, Jerod F. Mason, Steven P. Matte, John Pessia, Jason Chiesa, Sergey Nabokin, Gene A. Tkachenko, Richard A. Carter, Steven C. Sprinkle, Mikhail Shirokov
  • Patent number: 7839234
    Abstract: According to one exemplary embodiment, a switching module includes a first harmonic phase tuning filter coupled to a first input of an RF switch. The first harmonic phase tuning filter is configured to provide an output impedance that substantially matches an input impedance of the RF switch at approximately a fundamental frequency and to provide a high impedance at approximately a harmonic frequency generated by the RF switch. The first harmonic phase tuning filter includes an LC circuit coupled between input and output terminals of the first harmonic phase tuning filter and tuned to provide the high impedance at approximately the harmonic frequency generated by the RF switch. The RF switching module further includes a second harmonic phase tuning filter coupled to a second input of the RF switch. The first and second harmonic phase tuning filters can be fabricated on a single semiconductor die.
    Type: Grant
    Filed: July 12, 2007
    Date of Patent: November 23, 2010
    Assignee: Skyworks Solutions, Inc.
    Inventors: Dima Prikhodko, Gene A. Tkachenko, Richard A. Carter, Sergey Nabokin, Jason Chiesa, Steven C. Sprinkle, Yu Zhu, Beverly A. Peluso
  • Patent number: 7808342
    Abstract: According to one exemplary embodiment, a switching module includes a first harmonic phase tuning filter coupled to a first input of an RF switch. The first harmonic phase tuning filter is configured to provide an output impedance that substantially matches an input impedance of the RF switch at approximately a fundamental frequency and to provide a low impedance at approximately a harmonic frequency generated by the RF switch. The first harmonic phase tuning filter includes an LC circuit coupled between an output terminal of the first harmonic phase tuning filter and a ground and tuned to provide the low impedance at approximately the harmonic frequency generated by the RF switch. The RF switching module further includes a second harmonic phase tuning filter coupled to a second input of the RF switch. The first and second harmonic phase tuning filters can be fabricated on a single semiconductor die.
    Type: Grant
    Filed: July 12, 2007
    Date of Patent: October 5, 2010
    Assignee: Skyworks Solutions, Inc.
    Inventors: Dima Prikhodko, Gene A. Tkachenko, Richard A. Carter, Sergey Nabokin, Jason Chiesa, Steven C. Sprinkle, Yu Zhu, Beverly A. Peluso
  • Patent number: 7492209
    Abstract: According to one exemplary embodiment, a low harmonic switching device includes a first switching block including a first multi-gate FET, where the first switching block is coupled to a first input and a shared output of the low harmonic switching device. A first capacitor is coupled between a first gate and a source of the first multi-gate FET and a second capacitor is coupled between a second gate and a drain of the first multi-gate FET so as to cause a reduction in a harmonic amplitude in the shared output. A resistor can couple the source to the drain of the first multi-gate FET. The first switching block can further include a second multi-gate FET, where a source of the second multi-gate FET is coupled to the drain of the first multi-gate FET and a drain of the second multi-gate FET is coupled to the shared output.
    Type: Grant
    Filed: July 24, 2006
    Date of Patent: February 17, 2009
    Assignee: Skyworks Solutions, Inc.
    Inventors: Dima Prikhodko, Sergey Nabokin, Steven C. Sprinkle, Mikhail Shirokov, Gene A. Tkachenko, Jason Chiesa
  • Publication number: 20080166981
    Abstract: A switch element includes a switch device having a drain, a source and a plurality of gates, and at least one additional interconnect located between the plurality of gates, the additional interconnect operative to establish a constant potential between the at least two gates.
    Type: Application
    Filed: November 6, 2007
    Publication date: July 10, 2008
    Inventors: Dima Prikhodko, Jerod F. Mason, Steven P. Matte, John Pessia, Jason Chiesa, Sergey Nabokin, Gene A. Tkachenko, Richard A. Carter, Steven C. Sprinkle, Mikhail Shirokov
  • Publication number: 20080079513
    Abstract: According to one exemplary embodiment, a switching module includes a first harmonic phase tuning filter coupled to a first input of an RF switch. The first harmonic phase tuning filter is configured to provide an output impedance that substantially matches an input impedance of the RF switch at approximately a fundamental frequency and to provide a high impedance at approximately a harmonic frequency generated by the RF switch. The first harmonic phase tuning filter includes an LC circuit coupled between input and output terminals of the first harmonic phase tuning filter and tuned to provide the high impedance at approximately the harmonic frequency generated by the RF switch. The RF switching module further includes a second harmonic phase tuning filter coupled to a second input of the RF switch. The first and second harmonic phase tuning filters can be fabricated on a single semiconductor die.
    Type: Application
    Filed: July 12, 2007
    Publication date: April 3, 2008
    Inventors: Dima Prikhodko, Gene A. Tkachenko, Richard A. Carter, Sergey Nabokin, Jason Chiesa, Steven C. Sprinkle, Yu Zhu, Beverly A. Peluso
  • Publication number: 20080079514
    Abstract: According to one exemplary embodiment, a switching module includes a first harmonic phase tuning filter coupled to a first input of an RF switch. The first harmonic phase tuning filter is configured to provide an output impedance that substantially matches an input impedance of the RF switch at approximately a fundamental frequency and to provide a low impedance at approximately a harmonic frequency generated by the RF switch. The first harmonic phase tuning filter includes an LC circuit coupled between an output terminal of the first harmonic phase tuning filter and a ground and tuned to provide the low impedance at approximately the harmonic frequency generated by the RF switch. The RF switching module further includes a second harmonic phase tuning filter coupled to a second input of the RF switch. The first and second harmonic phase tuning filters can be fabricated on a single semiconductor die.
    Type: Application
    Filed: July 12, 2007
    Publication date: April 3, 2008
    Inventors: Dima Prikhodko, Gene A. Tkachenko, Richard A. Carter, Sergey Nabokin, Jason Chiesa, Steven C. Sprinkle, Yu Zhu, Beverly A. Peluso
  • Publication number: 20070243849
    Abstract: According to one exemplary embodiment, a low harmonic switching device includes a first switching block including a first multi-gate FET, where the first switching block is coupled to a first input and a shared output of the low harmonic switching device. A first capacitor is coupled between a first gate and a source of the first multi-gate FET and a second capacitor is coupled between a second gate and a drain of the first multi-gate FET so as to cause a reduction in a harmonic amplitude in the shared output. A resistor can couple the source to the drain of the first multi-gate FET. The first switching block can further include a second multi-gate FET, where a source of the second multi-gate FET is coupled to the drain of the first multi-gate FET and a drain of the second multi-gate FET is coupled to the shared output.
    Type: Application
    Filed: July 24, 2006
    Publication date: October 18, 2007
    Inventors: Dima Prikhodko, Sergey Nabokin, Steven C. Sprinkle, Mikhail Shirokov, Gene A. Tkachenko, Jason Chiesa