Abstract: Bias correction circuitry and techniques for multiterm addition are disclosed. An embodiment of an apparatus includes alignment circuitry, fixed-point correction circuitry, fixed-point addition circuitry and conversion circuitry. The alignment circuitry is configured to generate a set of fixed-point addend terms using mantissa values of a set of floating-point addend terms. The correction circuitry is configured to determine one or more bias correction values corresponding to one or more addend terms of the set of fixed-point addend terms. The addition circuitry is configured to produce a fixed-point addition result using the set of fixed-point addend terms and the one or more bias correction values, and the conversion circuitry is configured to generate a floating-point addition result using the fixed-point addition result.