Patents by Inventor Jason Daejin Park

Jason Daejin Park has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11049716
    Abstract: Provided herein are methods of filling gaps using high density plasma chemical vapor deposition (HDP CVD). According to various implementations, carbon-containing films such as amorphous carbon and amorphous carbide films are deposited by HDP CVD into gaps on substrates to fill the gaps. The methods may involve using high hydrogen-content process gasses during HDP CVD deposition to provide bottom-up fill. Also provided are related apparatus.
    Type: Grant
    Filed: November 16, 2018
    Date of Patent: June 29, 2021
    Assignee: Lam Research Corporation
    Inventors: Wei Tang, Jason Daejin Park, Bart J. van Schravendijk, Shu Tsai Wang, Kaihan Abidi Ashtiani
  • Patent number: 10615169
    Abstract: Methods and apparatuses for selectively depositing silicon nitride (SiN) via high-density plasma chemical vapor deposition (HDP CVD) to form a SiN pad on an exposed flat surface of a nitride layer in a 3D NAND staircase structure with alternating oxide and nitride layers are provided. In some embodiments, selective etching is performed to remove undesirable buildup of SiN on sidewalls of the oxide layers of the staircase structure. Nitride layers of the staircase structure are replaced with tungsten (W) to form tungsten wordlines, while the SiN pads are replaced with tungsten to from landing pads, which prevent punchthrough of the tungsten wordlines on the staircase structure by interconnects extending thereto.
    Type: Grant
    Filed: August 1, 2018
    Date of Patent: April 7, 2020
    Assignee: Lam Research Corporation
    Inventors: Bart J. van Schravendijk, Awnish Gupta, Patrick A. van Cleemput, Jason Daejin Park
  • Publication number: 20190181004
    Abstract: Provided herein are methods of filling gaps using high density plasma chemical vapor deposition (HDP CVD). According to various implementations, carbon-containing films such as amorphous carbon and amorphous carbide films are deposited by HDP CVD into gaps on substrates to fill the gaps. The methods may involve using high hydrogen-content process gasses during HDP CVD deposition to provide bottom-up fill. Also provided are related apparatus.
    Type: Application
    Filed: November 16, 2018
    Publication date: June 13, 2019
    Inventors: Wei Tang, Jason Daejin Park, Bart J. van Schravendijk, Shu Tsai Wang, Kaihan Abidi Ashtiani
  • Patent number: 10224235
    Abstract: A method for processing a substrate to create an air gap includes a) providing a substrate including a first trench and a second trench; b) depositing a conformal layer on the substrate; c) performing sputtering to at least partially pinch off an upper portion of the first trench and the second trench at a location spaced from upper openings of the first trench and the second trench; and d) performing sputtering/deposition to seal first and second airgaps in the first trench and the second trench.
    Type: Grant
    Filed: February 2, 2017
    Date of Patent: March 5, 2019
    Assignee: LAM RESEARCH CORPORATION
    Inventors: Jason Daejin Park, Bart van Schravendijk, Hsiang-yun Lee, Purushottam Kumar
  • Publication number: 20190043876
    Abstract: Methods and apparatuses for selectively depositing silicon nitride (SiN) via high-density plasma chemical vapor deposition (HDP CVD) to form a SiN pad on an exposed flat surface of a nitride layer in a 3D NAND staircase structure with alternating oxide and nitride layers are provided. In some embodiments, selective etching is performed to remove undesirable buildup of SiN on sidewalls of the oxide layers of the staircase structure. Nitride layers of the staircase structure are replaced with tungsten (W) to form tungsten wordlines, while the SiN pads are replaced with tungsten to from landing pads, which prevent punchthrough of the tungsten wordlines on the staircase structure by interconnects extending thereto.
    Type: Application
    Filed: August 1, 2018
    Publication date: February 7, 2019
    Inventors: Bart J. van Schravendijk, Awnish Gupta, Patrick A. van Cleemput, Jason Daejin Park
  • Patent number: 10023956
    Abstract: Methods and apparatuses for conditioning chambers using a two-stage process involving a low bias and a high bias stage are provided. Methods also involve clamping a protective electrostatic chuck cover to a pedestal by applying a bias to the electrostatic chuck during the high bias stage while cooling the protective electrostatic chuck cover, such as by flowing helium to the backside of the cover.
    Type: Grant
    Filed: April 9, 2015
    Date of Patent: July 17, 2018
    Assignee: Lam Research Corporation
    Inventors: Lin Cui, Jason Daejin Park
  • Patent number: 9741584
    Abstract: A method for densifying a dielectric film on a substrate includes arranging a substrate including a dielectric film on a substrate support in a substrate processing chamber; supplying a gas mixture including helium and oxygen to the substrate processing chamber; controlling pressure in the substrate processing chamber to a pressure greater than or equal to a predetermined pressure; supplying a first power level at a first frequency to a coil to create plasma in the substrate processing chamber. The coil is arranged around an outer surface of the substrate processing chamber. The method includes densifying the dielectric film for a predetermined period. The pressure and the first power level are selected to prevent sputtering of the dielectric film during densification of the dielectric film.
    Type: Grant
    Filed: May 5, 2016
    Date of Patent: August 22, 2017
    Assignee: LAM RESEARCH CORPORATION
    Inventors: Jason Daejin Park, Bart van Schravendijk
  • Publication number: 20170229337
    Abstract: A method for processing a substrate to create an air gap includes a) providing a substrate including a first trench and a second trench; b) depositing a conformal layer on the substrate; c) performing sputtering to at least partially pinch off an upper portion of the first trench and the second trench at a location spaced from upper openings of the first trench and the second trench; and d) performing sputtering/deposition to seal first and second airgaps in the first trench and the second trench.
    Type: Application
    Filed: February 2, 2017
    Publication date: August 10, 2017
    Inventors: Jason Daejin Park, Bart van Schravendijk, Hsiang-yun Lee, Purushottam Kumar
  • Publication number: 20160329213
    Abstract: A method for providing a metal diffusion barrier layer comprising providing a substrate including a metal layer; depositing a dielectric layer on the metal layer; defining a feature in the dielectric layer, wherein the feature includes side walls defined by the dielectric layer and a bottom surface defined by the metal layer; selectively depositing a metal diffusion barrier layer on the side walls of the feature and not depositing the metal diffusion barrier layer on the bottom surface of the feature, wherein the metal diffusion barrier layer includes amorphous carbon; and depositing metal in the feature.
    Type: Application
    Filed: April 11, 2016
    Publication date: November 10, 2016
    Inventors: Wei Tang, Jason Daejin Park, Patrick A. Van Cleemput, Yezdi Dordi
  • Publication number: 20160314964
    Abstract: Provided herein are methods of filling gaps using high density plasma chemical vapor deposition (HDP CVD). According to various implementations, carbon-containing films such as amorphous carbon and amorphous carbide films are deposited by HDP CVD into gaps on substrates to fill the gaps. The methods may involve using high hydrogen-content process gasses during HDP CVD deposition to provide bottom-up fill. Also provided are related apparatus.
    Type: Application
    Filed: April 21, 2015
    Publication date: October 27, 2016
    Inventors: Wei Tang, Jason Daejin Park, Bart J. van Schravendijk, Shu Tsai Wang, Kaihan Abidi Ashtiani
  • Publication number: 20160300713
    Abstract: Methods and apparatuses for conditioning chambers using a two-stage process involving a low bias and a high bias stage are provided. Methods also involve clamping a protective electrostatic chuck cover to a pedestal by applying a bias to the electrostatic chuck during the high bias stage while cooling the protective electrostatic chuck cover, such as by flowing helium to the backside of the cover.
    Type: Application
    Filed: April 9, 2015
    Publication date: October 13, 2016
    Inventors: Lin Cui, Jason Daejin Park
  • Patent number: 9406544
    Abstract: A method for filling a trench in a substrate includes partially filling the trench with a first silicon dioxide layer. An amorphous silicon layer is deposited on the silicon dioxide layer. The trench is filled with a second silicon dioxide layer. An oxidation treatment is performed on the substrate to oxidize the amorphous silicon layer.
    Type: Grant
    Filed: June 12, 2015
    Date of Patent: August 2, 2016
    Assignee: LAM RESEARCH CORPORATION
    Inventors: Wei Tang, Jason Daejin Park, Bart Van Schravendijk, Kaihan Ashtiani
  • Patent number: 9355886
    Abstract: A method and apparatus for conformally depositing a dielectric oxide in high aspect ratio gaps in a substrate is disclosed. A substrate is provided with one or more gaps into a reaction chamber where each gap has a depth to width aspect ratio of greater than about 5:1. A first dielectric oxide layer is deposited in the one or more gaps by CFD. A portion of the first dielectric oxide layer is etched using a plasma etch, where etching the portion of the first dielectric oxide layer occurs at a faster rate near a top surface than near a bottom surface of each gap so that the first dielectric oxide layer has a tapered profile from the top surface to the bottom surface of each gap. A second dielectric oxide layer is deposited in the one or more gaps over the first dielectric oxide layer via CFD.
    Type: Grant
    Filed: November 7, 2013
    Date of Patent: May 31, 2016
    Assignee: Novellus Systems, Inc.
    Inventors: Shankar Swaminathan, Bart van Schravendijk, Adrien LaVoie, Sesha Varadarajan, Jason Daejin Park, Michal Danek, Naohiro Shoda
  • Publication number: 20140134827
    Abstract: A method and apparatus for conformally depositing a dielectric oxide in high aspect ratio gaps in a substrate is disclosed. A substrate is provided with one or more gaps into a reaction chamber where each gap has a depth to width aspect ratio of greater than about 5:1. A first dielectric oxide layer is deposited in the one or more gaps by CFD. A portion of the first dielectric oxide layer is etched using a plasma etch, where etching the portion of the first dielectric oxide layer occurs at a faster rate near a top surface than near a bottom surface of each gap so that the first dielectric oxide layer has a tapered profile from the top surface to the bottom surface of each gap. A second dielectric oxide layer is deposited in the one or more gaps over the first dielectric oxide layer via CFD.
    Type: Application
    Filed: November 7, 2013
    Publication date: May 15, 2014
    Applicant: Novellus Systems, Inc.
    Inventors: Shankar Swaminathan, Bart van Schravendijk, Adrien Lavoie, Sesha Varadarajan, Jason Daejin Park, Michal Danek, Naohiro Shoda