Abstract: Method and system embodying the method for scheduling arbitration among a plurality of service requestors encompassing: designating among the plurality of service requestors all the service requestors that have an active request; determining whether at least one of the designated service requestors has an un-served status indicator which is set; and when the determining is positive then: selecting one of the at least one designated service requestors in accordance with a pre-determined policy; and clearing the un-served status indicator for the selected service requestor, is disclosed.

Abstract: Method and system embodying the method for programmable scheduling encompassing: enqueueing at least one command into one of a plurality of queues having a plurality of entries; determining a category of the command at the head entry of each of the plurality of queues; processing each determined non-job category command by a non-job command arbitrator; and processing each determined job category command by a job arbitrator and assignor, is disclosed.

Abstract: Method and system embodying the method for a direct memory access between a data storage and a data processing device via one or more direct memory access units, comprising transferring data between the data storage and a first direct memory access engine of a respective one or more direct memory access units and providing the data for a second direct memory access engine of the respective one or more direct memory access units; and transferring the data provided by the first direct memory access engine by a second direct memory access engine to the data processing device via the second direct memory access engine is disclosed.

Abstract: A method utilizing a system encompassing a free pool buffer; a deadlock avoidance buffer; and a controller communicatively coupled to the free pool buffer and the deadlock avoidance buffer to reorder out-of-order responses to fetch requests into correct order by: receiving a fetch request on behalf of a consumer; allocating space first in the free pool buffer and when such space is not available then allocating space in a division associated with the consumer in the deadlock avoidance buffer. Issuing segment(s) of the fetch request including associated tag(s) to one of one or more memories; writing response data for each of the segment(s) to the allocated space in the free buffer or the deadlock avoidance buffer according to each of the associated tag(s); and transferring the response data to the consumer according to an entry in an ordering first-in, first-out buffer and an entry in a pending request array.

Abstract: Method and system embodying the method for load balancing of scheduled jobs among a plurality of engines encompassing determining a number of cluster credits for each of a plurality of clusters that comprise at least one engine capable of processing a scheduled job; determining a number of engine credits for each of the plurality of engines comprising each of the at least one engine in accordance with a number of jobs assigned to each of the plurality of engines; evaluating the determined number of cluster credits and the determined number of engine credits in accordance with a credit evaluation policy; and assigning the job to one of the plurality of engines in accordance with the evaluation, is disclosed.

Abstract: A method and a system embodying the method for job pre-scheduling in a processing system comprising distributed job management, encompassing: determining a maximum amount of pre-schedulable jobs for each of a plurality of engines; setting for each of the plurality of engines a threshold less than or equal to the maximum amount; pre-scheduling by a scheduler an amount of jobs less than or equal to the threshold to at least one of a plurality of job managers; determining at the at least one of the plurality of job managers managing one of the plurality of engines one of a plurality of data processing devices in order for each pre-scheduled job; and assigning the job to the determined data processing device.

Abstract: A method and a system for port access management at a distributed job manager, encompassing: initializing a port access process for each of one or more ports on a processing device; determining first whether a job is assigned to an active slot identified by an active_slot_id on the processing device, and when the determining is positive: determining second whether the job has been serviced by a port identified by the active_slot_id; and when either the first determining is negative or the second determining is positive then: retesting the first and second determining; else: determining whether the job requires an access to the port identified by the active_slot_id; and when the determining is positive: fetching the port's configuration words; processing the fetched port's configuration words; marking the job as serviced by the port upon conclusion or the processing of the fetched port's configuration words; and recalculating the value of the active_slot_id.

Abstract: Methods and apparatus for coordinated multipoint receiver processing acceleration and latency reduction. In an exemplary embodiment, an apparatus includes a receiver that receives symbols from a wireless transmission and stores the symbols in a memory. The receiver also outputs an indicator that indicates that storage of the symbols in the memory has begun. The apparatus also includes a controller that outputs control signaling in response to the indicator. The apparatus also includes a link that acquires the symbols and remote scheduling and control information (RSCI) from the memory in response to receiving the control signaling. The link combines the symbols with the RSCI to form packets and transmits the packets to an external system.

Abstract: Methods and apparatus for coordinated multipoint receiver processing acceleration and latency reduction. In an exemplary embodiment, an apparatus includes a receiver that receives symbols from a wireless transmission and stores the symbols in a memory. The receiver also outputs an indicator that indicates that storage of the symbols in the memory has begun. The apparatus also includes a controller that outputs control signaling in response to the indicator. The apparatus also includes a link that acquires the symbols and remote scheduling and control information (RSCI) from the memory in response to receiving the control signaling. The link combines the symbols with the RSCI to form packets and transmits the packets to an external system.

Abstract: Method and system embodying the method for programmable scheduling encompassing: enqueueing at least one command into one of a plurality of queues having a plurality of entries; determining a category of the command at the head entry of each of the plurality of queues; processing each determined non-job category command by a non-job command arbitrator; and processing each determined job category command by a job arbitrator and assignor, is disclosed.

Abstract: Method and system embodying the method for for scheduling arbitration among a plurality of service requestors encompassing: designating among the plurality of service requestors all the service requestors that have an active request; determining whether at least one of the designated service requestors has an un-served status indicator which is set; and when the determining is positive then: selecting one of the at least one designated service requestors in accordance with a pre-determined policy; and clearing the un-served status indicator for the selected service requestor, is disclosed.

Abstract: A method utilizing a system encompassing a free pool buffer; a deadlock avoidance buffer; and a controller communicatively coupled to the free pool buffer and the deadlock avoidance buffer to reorder out-of-order responses to fetch requests into correct order by: receiving a fetch request on behalf of a consumer; allocating space first in the free pool buffer and when such space is not available then allocating space in a division associated with the consumer in the deadlock avoidance buffer. Issuing segment(s) of the fetch request including associated tag(s) to one of one or more memories; writing response data for each of the segment(s) to the allocated space in the free buffer or the deadlock avoidance buffer according to each of the associated tag(s); and transferring the response data to the consumer according to an entry in an ordering first-in, first-out buffer and an entry in a pending request array.

Abstract: Method and system embodying the method for load balancing of scheduled jobs among a plurality of engines encompassing determining a number of cluster credits for each of a plurality of clusters that comprise at least one engine capable of processing a scheduled job; determining a number of engine credits for each of the plurality of engines comprising each of the at least one engine in accordance with a number of jobs assigned to each of the plurality of engines; evaluating the determined number of cluster credits and the determined number of engine credits in accordance with a credit evaluation policy; and assigning the job to one of the plurality of engines in accordance with the evaluation, is disclosed.

Abstract: A method and a system embodying the method for job pre-scheduling in a processing system comprising distributed job management, encompassing: determining a maximum amount of pre-schedulable jobs for each of a plurality of engines; setting for each of the plurality of engines a threshold less than or equal to the maximum amount; pre-scheduling by a scheduler an amount of jobs less than or equal to the threshold to at least one of a plurality of job managers; determining at the at least one of the plurality of job managers managing one of the plurality of engines one of a plurality of data processing devices in order for each pre-scheduled job; and assigning the job to the determined data processing device.

Abstract: A method and a system for port access management at a distributed job manager, encompassing: initializing a port access process for each of one or more ports on a processing device; determining first whether a job is assigned to an active slot identified by an active_slot_id on the processing device, and when the determining is positive: determining second whether the job has been serviced by a port identified by the active_slot_id; and when either the first determining is negative or the second determining is positive then: retesting the first and second determining; else: determining whether the job requires an access to the port identified by the active_slot_id; and when the determining is positive: fetching the port's configuration words; processing the fetched port's configuration words; marking the job as serviced by the port upon conclusion or the processing of the fetched port's configuration words; and recalculating the value of the active_slot_id.

Abstract: Method and system embodying the method for a direct memory access between a data storage and a data processing device via one or more direct memory access units, comprising transferring data between the data storage and a first direct memory access engine of a respective one or more direct memory access units and providing the data for a second direct memory access engine of the respective one or more direct memory access units; and transferring the data provided by the first direct memory access engine by a second direct memory access engine to the data processing device via the second direct memory access engine is disclosed.

Abstract: Method and system embodying the method for a general address transformation for an access to a shared memory comprising at least one tile and each tile comprising at least one memory bank, comprising selecting a mode of a general address transformation; providing a general address comprising a plurality of bits by at least one of a plurality of devices; and transforming the general address onto a transformed address according to the selected mode; wherein in a first selected mode the transforming comprises determining each of a plurality of bits of a transformed address as an exclusive or of at least two bits of the plurality of bits of the general address provided that the shared memory comprises a plurality of tiles, and/or each tile comprises a plurality of banks is disclosed.