Patents by Inventor Jason Doege

Jason Doege has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9374219
    Abstract: A method and apparatus are described securely testing an integrated circuit (IC). When the IC is powered on, a first bit stream including unencrypted data bits and encrypted data bits is received by the IC, a second bit stream is generated based on a pseudorandom pattern, a third bit stream is generated by convolving the first bit stream with the second bit stream, the third bit stream is fed to at least one selected test data register (TDR), (i.e., a shift register), in the IC, a fourth bit stream is generated by delaying the second bit stream, and a fifth bit stream is generated by convolving a sixth bit stream output by the at least one selected TDR with the fourth bit stream. The fifth bit stream includes the same unencrypted data bits and encrypted data bits as the first bit stream.
    Type: Grant
    Filed: November 24, 2014
    Date of Patent: June 21, 2016
    Assignee: Advanced Micro Devices, Inc.
    Inventor: Jason Doege
  • Publication number: 20160149697
    Abstract: A method and apparatus are described securely testing an integrated circuit (IC). When the IC is powered on, a first bit stream including unencrypted data bits and encrypted data bits is received by the IC, a second bit stream is generated based on a pseudorandom pattern, a third bit stream is generated by convolving the first bit stream with the second bit stream, the third bit stream is fed to at least one selected test data register (TDR), (i.e., a shift register), in the IC, a fourth bit stream is generated by delaying the second bit stream, and a fifth bit stream is generated by convolving a sixth bit stream output by the at least one selected TDR with the fourth bit stream. The fifth bit stream includes the same unencrypted data bits and encrypted data bits as the first bit stream.
    Type: Application
    Filed: November 24, 2014
    Publication date: May 26, 2016
    Applicant: ADVANCED MICRO DEVICES, INC.
    Inventor: Jason Doege
  • Publication number: 20050203716
    Abstract: An invention is disclosed which automates the discovery in a digital logic semiconductor device of the location of a defect which causes signals to propagate in a manner delayed from the defect free condition. A tester operating system controls application of test patterns designed for delay fault discovery and causes a static timing verifier application to choose additional paths to test which in combination, elucidate the location to one segment of the problematical path.
    Type: Application
    Filed: December 19, 2003
    Publication date: September 15, 2005
    Applicant: Inovys Corporation
    Inventors: Donald Organ, Jason Doege