Patents by Inventor Jason Engle

Jason Engle has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7337522
    Abstract: A method and apparatus for fabricating a three dimensional array of semiconductor chips is disclosed. The method uses a multiple step fabrication process that automates the surface mounting of semiconductor chips with unique chip carriers to achieve the three dimensional array of chips. The method can include the steps of depositing solder on one or more chip modules, placing and interconnecting low-cost components on the chip modules, and storing the preprocessed chip modules in pallets or in a tape and reel. Later these chip carriers may then be mounted on a circuit board, possibly over; for example, low and/or high cost components and then populated with low and/or high cost components. The apparatus includes a unique stackable chip module pallet and print fixture pedestal.
    Type: Grant
    Filed: November 9, 2005
    Date of Patent: March 4, 2008
    Assignee: Legacy Electronics, Inc.
    Inventors: Jason Engle, Rhandee Abrio, Julie Roslyn Bradbury-Bennett, Greg Allee, Kenneth Kledzik
  • Publication number: 20060254809
    Abstract: An apparatus and method is disclosed that allows for the arranging in a three dimensional array semiconductor chips on a circuit board. A unique chip carrier is disclosed on which any IC chip can be positioned on above the other on a circuit board. Additionally, the carrier allows for the testing of IC chips on the carrier and underneath it without having to remove the carrier and chips from the system even if they are of the BGA or CSP type. The carrier includes exposed test points to allow an on site test.
    Type: Application
    Filed: July 13, 2006
    Publication date: November 16, 2006
    Inventors: Kenneth Kledzik, Jason Engle
  • Publication number: 20060107524
    Abstract: A method and apparatus for fabricating a three dimensional array of semiconductor chips is disclosed. The method uses a multiple step fabrication process that automates the surface mounting of semiconductor chips with unique chip carriers to achieve the three dimensional array of chips. The method can include the steps of depositing solder on one or more chip modules, placing and interconnecting low-cost components on the chip modules, and storing the preprocessed chip modules in pallets or in a tape and reel. Later these chip carriers may then be mounted on a circuit board, possibly over; for example, low and/or high cost components and then populated with low and/or high cost components. The apparatus includes a unique stackable chip module pallet and print fixture pedestal.
    Type: Application
    Filed: November 9, 2005
    Publication date: May 25, 2006
    Inventors: Jason Engle, Rhandee Abrio, Julie Bradbury-Bennett, Greg Allee, Kenneth Kledzik