Abstract: A compound having the following formula is disclosed. The compound is useful as an emitter in OLED applications.

Abstract: Machine learning systems and methods are disclosed for prediction of wound healing, such as for diabetic foot ulcers or other wounds, and for assessment implementations such as segmentation of images into wound regions and non-wound regions. Systems for assessing or predicting wound healing can include a light detection element configured to collect light of at least a first wavelength reflected from a tissue region including a wound, and one or more processors configured to generate an image based on a signal from the light detection element having pixels depicting the tissue region, determine reflectance intensity values for at least a subset of the pixels, determine one or more quantitative features of the subset of the plurality of pixels based on the reflectance intensity values, and generate a predicted or assessed healing parameter associated with the wound over a predetermined time interval.

Abstract: Provided are novel compounds having a structure of that are useful as emitters in OLEDs.

Abstract: Provided are organic light emitting devices (OLED) comprising an anode; a cathode, and an organic layer between the anode and the cathode, the organic layer comprising a light-emitting dopant within a host material, the light-emitting dopant being an optically active Pt complex comprising a tetradentate ligand; wherein one enantiomer of the optically active Pt complex is present in an enantiomeric excess (ee) of at least 5%. Further provided are OLEDs comprising an anode, a cathode, and an organic layer between the anode and the cathode, the organic layer the organic layer comprising a light-emitting chiral dopant within a chiral host material, the light-emitting chiral dopant being an optically active complex; wherein one enantiomer of the optically active complex of the chiral dopant is present in an ee of at least 5%, and wherein one enantiomer of the chiral host material is present in an ee of at least 5%.

Abstract: Provided are compounds having a tetradentate structure of that are useful as emitters in OLED applications.

Abstract: A modular mask including a first module including a frame having two or more openings, and an attaching mechanism lining one or more edges of the two or more openings; and a second module including: a mask body having a first attaching element allowing the attaching mechanism to temporarily hold the mask body in place completely covering a first opening of the two or more openings, and a filter component having a second attaching element allowing the attaching mechanism to temporarily hold the filter component in place completely covering a second opening of the two or more openings.

Abstract: A Glock compensator integral with a barrel, and a slide assembly allow escaping gases to dampen recoil associated with firing a Glock firearm. The Glock barrel is removed from the front of the firearm allowing for the integrated compensator at the front of the firearm. Various features, including a lock design, debris port, swept back side ports, height offset, nose ring design and mass-reducing rear cutout, result in an efficient and effective integrated compensator suitable for 4th and 5th generation Glock firearms. The compensator and barrel may be fabricated from the same piece of billet. A pair of side rails may be positioned and configured to slidably receive a slide assembly.

Abstract: A Glock compensator integral with a barrel, and a slide assembly allow escaping gases to dampen recoil associated with firing a Glock firearm. The Glock barrel is removed from the front of the firearm allowing for the integrated compensator at the front of the firearm. Various features, including a lock design, debris port, swept back side ports, height offset, nose ring design and mass-reducing rear cutout, result in an efficient and effective integrated compensator suitable for 4th and 5th generation Glock firearms. The compensator and barrel may be fabricated from the same piece of billet. A pair of side rails may be positioned and configured to slidably receive a slide assembly.

Abstract: A Glock compensator integral with a barrel, and a slide assembly allow escaping gases to dampen recoil associated with firing a Glock firearm. The Glock barrel is removed from the front of the firearm allowing for the integrated compensator at the front of the firearm. Various features, including a lock design, debris port, swept back side ports, height offset, nose ring design and mass-reducing rear cutout, result in an efficient and effective integrated compensator suitable for 4th and 5th generation Glock firearms. The compensator and barrel may be fabricated from the same piece of billet. A pair of side rails may be positioned and configured to slidably receive a slide assembly.

Abstract: A Glock compensator integral with a barrel, and a slide assembly allow escaping gases to dampen recoil associated with firing a Glock firearm. The Glock barrel is removed from the front of the firearm allowing for the integrated compensator at the front of the firearm. Various features, including a lock design, debris port, swept back side ports, height offset, nose ring design and mass-reducing rear cutout, result in an efficient and effective integrated compensator suitable for 4th and 5th generation Glock firearms. The compensator and barrel may be fabricated from the same piece of billet.

Abstract: A firearm having an integral recoil booster including a pair of bushings and spring positioned to interact with an integral firearm compensator; a quick detach mount for one or more suppressor baffles; and one or more suppression baffles. As configured, the integral recoil booster also generates additional force ensuring contact at a slide/barrel interface. A monolithic suppressor may also be used with the quick detach mount.

Abstract: A firearm having an integral recoil booster including a pair of bushings and spring positioned to interact with an integral firearm compensator; a quick detach mount for one or more suppressor baffles; and one or more suppression baffles. As configured, the integral recoil booster also generates additional force ensuring contact at a slide/barrel interface. A monolithic suppressor may also be used with the quick detach mount.

Abstract: A system of switches having a memory/command bus having a first interface, a second interface and a third interface. A memory is connected to the third interface of the memory/command bus. The memory has a first memory address. A first switch monitors the memory/command bus and interprets information written to the first memory address as proxy information. The first switch is connected to the first interface of the memory/command bus. The second switch monitors the memory/command bus and interprets information written to the first memory address as proxy information. The second switch is connected to the second interface of the memory/command bus.

Abstract: A method and structure for the distribution and utilization of synchronization within an asynchronous network is described herein. Synchronization is distributed through an asynchronous network via a synchronization symbol periodically inserted on the MAC layer. The priority of this symbol ensures that this symbol is inserted in the MAC layer data stream ahead of all other types of symbols. The insertion of the synchronization symbol in the middle of an ongoing data frame is supported. In addition, a method for synchronization symbol distribution throughout an asynchronous network is presented, along with a method for switching to a new synchronization path (in the event of loss of original synchronization path) based on minimum number of hops from the synchronization source.

Abstract: Error codes output from a serializer/deserializer in a node of a communications network are detected by error decode logic that assumes that each new error occurrence reflects a one bit error in the word giving rise to the error code. Each error occurrence is then counted. When the error count reaches a predetermined limit (e.g., 250 errors), the total bit count required to accumulate the 250 errors is then determined. The total bits can be determined based on a clock count (time). The BER is then calculated based upon the fixed error limit and the total bit count. This BER is then reported and used to determine the health of the network.

Abstract: A method and system for synchronizing data between a management system (MS) and network elements (NE) in an optical network utilizes a table counter and row counters for each row in a NE table, and a table counter and row counter for each row in a MS table. The NE table counter increments when a change in the NE table occurs. Each NE row counter increments when its row is changed. The MS table counter increments when a change in the MS table occurs. Each MS row counter is incremented when its row is changed. The MS polls the NE table counter and compares it with its MS table counter. If they are different, then the MS compares each NE row counter with the corresponding MS row counter. For any of the row counters that do not match, the rows between the MS table and the NE table are synchronized.

Abstract: A method and system for selecting ring paths in service provisioning on optical networks including a plurality of interconnected rings. The method includes: receiving a request to provision a service between a first end point and a second end point in the optical network; identifying a plurality of possible ring paths between the first and second end points; validating a bandwidth of each ring path, including validating bandwidths of bandwidth bottlenecks in each ring path; selecting a path from the validated ring paths; and provisioning the service on the selected path. The system utilizes a path engine on a network management server that knows about the bandwidth allocation in the entire network and implements the method. The resources of the optical network used by the provisioned service is thus minimized.

Abstract: Error codes output from a serializer/deserializer in a node of a communications network are detected by error decode logic that assumes that each new error occurrence reflects a one bit error in the word giving rise to the error code. Each error occurrence is then counted. When the error count reaches a predetermined limit (e.g., 250 errors), the total bit count required to accumulate the 250 errors is then determined. The total bits can be determined based on a clock count (time). The BER is then calculated based upon the fixed error limit and the total bit count. This BER is then reported and used to determine the health of the network.

Abstract: A system of switches having a memory/command bus having a first interface, a second interface and a third interface. A memory is connected to the third interface of the memory/command bus. The memory has a first memory address. A first switch monitors the memory/command bus and interprets information written to the first memory address as proxy information. The first switch is connected to the first interface of the memory/command bus. The second switch monitors the memory/command bus and interprets information written to the first memory address as proxy information. The second switch is connected to the second interface of the memory/command bus.