Abstract: An internal route usage information from a set of internal route usage information is analyzed to determine an encoding structure used in the internal route usage information and an external route that is referenced in internal route usage information. Using the set of internal route usage information, a subset of external route change information is selected from a set of external route change information, where each changed external route represented in the subset is usable to reach a currently used destination on an external network. A first external route change information from the subset is encoded according to the encoding structure, forming a first encoded route change data. Using the first encoded route change data, an internal router in an internal network is caused to recognize a status change in a first external route.

Abstract: An internal route usage information from a set of internal route usage information is analyzed to determine an encoding structure used in the internal route usage information and an external route that is referenced in internal route usage information. Using the set of internal route usage information, a subset of external route change information is selected from a set of external route change information, where each changed external route represented in the subset is usable to reach a currently used destination on an external network. A first external route change information from the subset is encoded according to the encoding structure, forming a first encoded route change data. Using the first encoded route change data, an internal router in an internal network is caused to recognize a status change in a first external route.

Abstract: Preparing a plurality of computer nodes to boot in a multidimensional fabric network is provided. The method includes a fabric processor (FP) generating a plurality of DHCP discovery packets using a baseboard management controller (BMC) MAC address, and placing them into the multi-host switch. A dedicated connection directly connects the BMC and the FP. All ports of the multi-host switch broadcast DHCP discovery packets into the fabric network. The BMC, FP, and switch are all within the node. A designated exit node inside the fabric connects to a provisioning node not part of the fabric. The exit node relays DHCP traffic from the fabric. A location-based IP address uniquely identifies the nodes' physical location in the fabric. The IP address is calculated based on inventory records describing physical location information about the nodes. The FP calculates a host MAC address using its IP address and configures it onto the switch.

Abstract: Preparing a plurality of computer nodes to boot in a multidimensional fabric network is provided. The method includes a fabric processor (FP) generating a plurality of DHCP discovery packets using a baseboard management controller (BMC) MAC address, and placing them into the multi-host switch. A dedicated connection directly connects the BMC and the FP. All ports of the multi-host switch broadcast DHCP discovery packets into the fabric network. The BMC, FP, and switch are all within the node. A designated exit node inside the fabric connects to a provisioning node not part of the fabric. The exit node relays DHCP traffic from the fabric. A location-based IP address uniquely identifies the nodes' physical location in the fabric. The IP address is calculated based on inventory records describing physical location information about the nodes. The FP calculates a host MAC address using its IP address and configures it onto the switch.

Abstract: A sled mounted processing node apparatus includes a first processing node sled. A first printed circuit board (PCB) is coupled to the processing node sled. Electronic components, including at least one processor, are coupled to the PCB. The apparatus includes a second processing node sled having a second PCB connected to the second processing node sled and a second set of electronic components, including at least one second processor, coupled to the second PCB. The at least one processor and second processor collectively enables increased processing density within a single server chassis. Each processing node sled is configured to be slideably inserted and removed from a server chassis that accommodates concurrent insertion of multiple processing node sleds in respective sled bays of the server chassis.

Abstract: A sled mounted processing node apparatus includes a first processing node sled. A first printed circuit board (PCB) is coupled to the processing node sled. Electronic components, including at least one processor, are coupled to the PCB. The apparatus includes a second processing node sled having a second PCB connected to the second processing node sled and a second set of electronic components, including at least one second processor, coupled to the second PCB. The at least one processor and second processor collectively enables increased processing density within a single server chassis. Each processing node sled is configured to be slideably inserted and removed from a server chassis that accommodates concurrent insertion of multiple processing node sleds in respective sled bays of the server chassis.