Patents by Inventor Jason Hoff

Jason Hoff has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7168055
    Abstract: A method for detecting nets physically changed and electrically affected by a design ECO includes steps as follows. An ECO is executed on an IC design to produce a post-ECO IC design. A first group of nets of the IC design physically changed by the ECO is identified by comparing a pre-ECO database with a post-ECO database. A pre-ECO design SPEF file of the IC design is parsed with a script to identify a second group of nets in the pre-ECO database based on the first group of nets, the second group of nets being coupled to the first group of nets. The second group of nets is pre-ECO electrically affected nets. Parasitics for the first group of nets in the post-ECO database are extracted to generate a parasitic data file for the first group of nets. The parasitic data file is parsed with the script to identify a third group of nets in the post-ECO database based on the first group of nets, the third group of nets being coupled to the first group of nets.
    Type: Grant
    Filed: August 10, 2004
    Date of Patent: January 23, 2007
    Assignee: LSI Logic Corporation
    Inventors: Jason Hoff, Daniel Prevedel
  • Publication number: 20060136855
    Abstract: A method of implementing an engineering change order includes steps of: (a) receiving as input an integrated circuit design; (b) receiving as input an engineering change order to the integrated circuit design; (c) creating at least one window in the integrated circuit design that encloses a change to the integrated circuit design introduced by the engineering change order wherein the window is bounded by coordinates that define an area that is less than an entire area of the integrated circuit design; (d) performing a routing of the integrated circuit design that excludes routing of any net that is not enclosed by the window; (e) replacing an area in a copy of the integrated circuit design that is bounded by the coordinates of the window with results of the incremental routing to generate a revised integrated circuit design; and (f) generating as output the revised integrated circuit design.
    Type: Application
    Filed: December 17, 2004
    Publication date: June 22, 2006
    Inventors: Jason Hoff, Viswanathan Lakshmanan, Michael Josephides, Daniel Prevedel, Richard Blinne, Jonathan Kuppinger
  • Publication number: 20060036982
    Abstract: A method for detecting nets physically changed and electrically affected by a design ECO includes steps as follows. An ECO is executed on an IC design to produce a post-ECO IC design. A first group of nets of the IC design physically changed by the ECO is identified by comparing a pre-ECO database with a post-ECO database. A pre-ECO design SPEF file of the IC design is parsed with a script to identify a second group of nets in the pre-ECO database based on the first group of nets, the second group of nets being coupled to the first group of nets. The second group of nets is pre-ECO electrically affected nets. Parasitics for the first group of nets in the post-ECO database are extracted to generate a parasitic data file for the first group of nets. The parasitic data file is parsed with the script to identify a third group of nets in the post-ECO database based on the first group of nets, the third group of nets being coupled to the first group of nets.
    Type: Application
    Filed: August 10, 2004
    Publication date: February 16, 2006
    Inventors: Jason Hoff, Daniel Prevedel
  • Patent number: 6680629
    Abstract: A long channel transistor and a shorter channel transistor operate in conjunction to drive an output node. The long channel device is first activated by a drive signal and the drive signal is input to a delay element that then activates the shorter channel device. By enabling the long channel device first, hot carrier injection effects are reduced. Employing two transistors that are sized to operate in different voltage ranges reduces surge current. The two-transistor configuration of the present invention occupies less area than a single long channel device with similar drive capabilities.
    Type: Grant
    Filed: December 18, 2001
    Date of Patent: January 20, 2004
    Assignee: LSI Logic Corporation
    Inventors: Andrew M. Rankin, Jason Hoff, Ken Szajda
  • Publication number: 20030112039
    Abstract: A long channel transistor and a shorter channel transistor operate in conjunction to drive an output node. The long channel device is first activated by a drive signal and the drive signal is input to a delay element that then activates the shorter channel device. By enabling the long channel device first, hot carrier injection effects are reduced. Employing two transistors that are sized to operate in different voltage ranges reduces surge current. The two-transistor configuration of the present invention occupies less area than a single long channel device with similar drive capabilities.
    Type: Application
    Filed: December 18, 2001
    Publication date: June 19, 2003
    Inventors: Andrew M. Rankin, Jason Hoff, Ken Szajda