Patents by Inventor Jason J. Duquette
Jason J. Duquette has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11930607Abstract: A field-replaceable unit is reversibly secured in place using two captive fasteners. Each fastener includes a telescoping knob that rotates 180 degrees in a first direction to engage a latch mechanism and rotates 180 degrees in the opposite direction to disengage the latch mechanism. The knob automatically extends when the latch mechanism is disengaged. The knob alternately extends and retracts in response to being successively pressed when the latch mechanism is engaged. The knob has two cutaways formed along outside edges to facilitate a two-finger grip for knob rotation and pulling the unit out of another module. A circular groove centered on an axis of rotation of the knob has a contrasting coloration and provides a visual and tactile indication of know location. A nub indicates rotational position of the knob.Type: GrantFiled: January 28, 2021Date of Patent: March 12, 2024Assignee: Dell Products L.P.Inventors: Amrita Sidhu Maguire, Ilhan C Gundogan, Keith C Johnson, Jason J Duquette
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Patent number: 11784916Abstract: A control node and/or a storage processing node maybe configured to modify a control path between a control node and storage processing node to include at least a portion of a data fabric and another processing node. Control communications may be sent over the data fabric by encapsulating control information that is configured in accordance with a first technology of the control fabric within communications configured in accordance with a second technology of the data fabric. Control switching logic may include logic to switch to a modified control path that includes at least a portion of a data fabric: in response to a failure of the control path; to load balance management activity; and/or improve QoS of management activity.Type: GrantFiled: July 23, 2021Date of Patent: October 10, 2023Assignee: EMC IP Holding Company LLCInventors: Akash B. Appaiah, Julie Zhivich, Jason J. Duquette
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Patent number: 11762556Abstract: A method, computer program product, and computer system for receiving, by a computing device, an I/O request. It may be identified whether the I/O request is eligible for handling via a first path without also requiring handling via a second path. If the I/O request is eligible, the I/O request may be processed via the first path on a host I/O stack without processing the I/O request via the second path on a storage array I/O stack. If the I/O request is ineligible, the I/O request may be processed via the first path on the host.Type: GrantFiled: August 25, 2021Date of Patent: September 19, 2023Assignee: EMC IP Holding Company, LLCInventors: Adnan Sahin, Michael Scharland, Robert DeCrescenzo, Steven T. McClure, James Marriott Guyer, Jason J. Duquette
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Publication number: 20230026171Abstract: A control node and/or a storage processing node maybe configured to modify a control path between a control node and storage processing node to include at least a portion of a data fabric and another processing node. Control communications may be sent over the data fabric by encapsulating control information that is configured in accordance with a first technology of the control fabric within communications configured in accordance with a second technology of the data fabric. Control switching logic may include logic to switch to a modified control path that includes at least a portion of a data fabric: in response to a failure of the control path; to load balance management activity; and/or improve QoS of management activity.Type: ApplicationFiled: July 23, 2021Publication date: January 26, 2023Applicant: EMC IP Holding Company LLCInventors: Akash B. Appaiah, Julie Zhivich, Jason J. Duquette
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Patent number: 11537313Abstract: Mirrored volatile memory in a storage system is configured with a dual cast region of addresses. Buffers in the dual cast region are allocated for data associated with a received Write IO. A host IO device associates the dual cast addresses with the data. A switch or CPU complex recognizes the dual cast addresses associated with the data and, in response, creates and sends a first copy of the data to a first volatile memory mirror and creates and sends a second copy of the data to a second volatile memory mirror. The second copy may be sent via PCIe NTB between switches or CPU complexes.Type: GrantFiled: August 11, 2021Date of Patent: December 27, 2022Assignee: EMC IP HOLDING COMPANY LLCInventors: Jason J Duquette, James M Guyer, Thomas Mackintosh, Earl Medeiros
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Patent number: 11500549Abstract: Secure access to data on a storage system via direct connection to an internal fabric of the storage system may be provided. A storage system interface (SSI) may validate each I/O communication originating on the host system before allowing a corresponding I/O communication to be transmitted on the internal fabric. The validation may include applying predefined rules and/or ensuring that the I/O communication conforms to one or more technologies, e.g., NVMe. The SSI may be configured to encrypt I/O communications originating on a host system and to decrypt I/O communications received from the storage system, for example, in embodiments in which data is encrypted in flight from the host system to physical storage devices, and data may be encrypted at rest in memory of the storage system and/or on physical storage devices.Type: GrantFiled: April 19, 2019Date of Patent: November 15, 2022Assignee: EMC IP Holding Company LLCInventors: Ian Wigmore, Alesia A. Tringale, Jason J. Duquette
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Publication number: 20220240401Abstract: A field-replaceable unit is reversibly secured in place using two captive fasteners. Each fastener includes a telescoping knob that rotates 180 degrees in a first direction to engage a latch mechanism and rotates 180 degrees in the opposite direction to disengage the latch mechanism. The knob automatically extends when the latch mechanism is disengaged. The knob alternately extends and retracts in response to being successively pressed when the latch mechanism is engaged. The knob has two cutaways formed along outside edges to facilitate a two-finger grip for knob rotation and pulling the unit out of another module. A circular groove centered on an axis of rotation of the knob has a contrasting coloration and provides a visual and tactile indication of know location. A nub indicates rotational position of the knob.Type: ApplicationFiled: January 28, 2021Publication date: July 28, 2022Applicant: EMC IP HOLDING COMPANY LLCInventors: Amrita Sidhu Maguire, Ilhan C. Gundogan, Keith C. Johnson, Jason J. Duquette
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Publication number: 20210382629Abstract: A method, computer program product, and computer system for receiving, by a computing device, an I/O request. It may be identified whether the I/O request is eligible for handling via a first path without also requiring handling via a second path. If the I/O request is eligible, the I/O request may be processed via the first path on a host I/O stack without processing the I/O request via the second path on a storage array I/O stack.Type: ApplicationFiled: August 25, 2021Publication date: December 9, 2021Inventors: Adnan Sahin, Michael Scharland, Robert DeCrescenzo, Steven T. McClure, James Marriott Guyer, Jason J. Duquette
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Patent number: 11163468Abstract: Techniques for processing metadata (MD) may include: determining, in accordance with one or more criteria, a plurality of MD blocks that are similar and expected to have matching corresponding portions of MD in at least some of the plurality of MD blocks; forming a MD superblock including the plurality of MD blocks; filtering the MD superblock and generating a filtered MD superblock, wherein said filtering includes rearranging content of the MD superblock so that a first plurality of MD portions that are similar are grouped together in the filtered MD superblock, wherein at least some of the first plurality of MD portions that are similar are expected to match; and compressing the filtered MD superblock and generating a compressed filtered MD superblock. Filtering may include performing a bitshuffle algorithm that includes performing a bitwise transpose of a matrix of the MD blocks in the MD superblock.Type: GrantFiled: July 1, 2019Date of Patent: November 2, 2021Assignee: EMC IP Holding Company LLCInventors: Aidan O Mahony, Jason J. Duquette
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Patent number: 11151063Abstract: A host system is connected to the internal fabric of a storage system without an intervening external network or director or other component of the storage system controlling the host system's access to the internal fabric. The host system may exchange I/O communications with physical storage devices and/or global memory over an I/O path that does not include any directors, for example, over the internal fabric to which the host system is directly attached. In embodiments in which at least a portion of the global memory is considered part of a director, the host system may be configured to communicate with such global memory over the internal fabric and without use of director compute resources.Type: GrantFiled: April 19, 2019Date of Patent: October 19, 2021Assignee: EMC IP Holding Company LLCInventors: Ian Wigmore, Alesia A. Tringale, Jason J. Duquette
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Patent number: 11106360Abstract: A method, computer program product, and computer system for receiving, by a computing device, an I/O request. It may be identified whether the I/O request is eligible for handling via a first path without also requiring handling via a second path. If the I/O request is eligible, the I/O request may be processed via the first path on a host I/O stack without processing the I/O request via the second path on a storage array I/O stack. If the I/O request is ineligible, the I/O request may be processed via the first path on the host I/O stack and via the second path on the storage array I/O stack.Type: GrantFiled: October 31, 2017Date of Patent: August 31, 2021Assignee: EMC IP Holding Company, LLCInventors: Adnan Sahin, Michael Scharland, Robert DeCrescenzo, Steven T. McClure, James Marriott Guyer, Jason J. Duquette
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Patent number: 11003539Abstract: Offload processing may be provided that is not dedicated to a primary processor or a subset of primary processors. A system may have one or more offload processing devices, including one or more APUs, coupled to data storage slots of the system, which can be shared by multiple primary processors of the system. Each offload processing device may be configured to be coupled to a storage slot, for example, as if the device were a storage drive, and include an interface in conformance with a version of an NVMe specification and may have a form factor in accordance with the U.2 specification. The APU within each offload processing device may be communicatively coupled to one or more primary processors by switching fabric disposed between the one or more primary processors and the storage slot to which the offload processing device is connected.Type: GrantFiled: January 15, 2019Date of Patent: May 11, 2021Assignee: EMC IP Holding Company LLCInventors: Jon I. Krasner, Jonathan P. Sprague, Jason J. Duquette
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Publication number: 20210004157Abstract: Techniques for processing metadata (MD) may include: determining, in accordance with one or more criteria, a plurality of MD blocks that are similar and expected to have matching corresponding portions of MD in at least some of the plurality of MD blocks; forming a MD superblock including the plurality of MD blocks; filtering the MD superblock and generating a filtered MD superblock, wherein said filtering includes rearranging content of the MD superblock so that a first plurality of MD portions that are similar are grouped together in the filtered MD superblock, wherein at least some of the first plurality of MD portions that are similar are expected to match; and compressing the filtered MD superblock and generating a compressed filtered MD superblock. Filtering may include performing a bitshuffle algorithm that includes performing a bitwise transpose of a matrix of the MD blocks in the MD superblock.Type: ApplicationFiled: July 1, 2019Publication date: January 7, 2021Applicant: EMC IP Holding Company LLCInventors: Aidan O Mahony, Jason J. Duquette
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Publication number: 20200334177Abstract: A host system is connected to the internal fabric of a storage system without an intervening external network or director or other component of the storage system controlling the host system's access to the internal fabric. The host system may exchange I/O communications with physical storage devices and/or global memory over an I/O path that does not include any directors, for example, over the internal fabric to which the host system is directly attached. In embodiments in which at least a portion of the global memory is considered part of a director, the host system may be configured to communicate with such global memory over the internal fabric and without use of director compute resources.Type: ApplicationFiled: April 19, 2019Publication date: October 22, 2020Applicant: EMC IP Holding Company LLCInventors: Ian Wigmore, Alesia A. Tringale, Jason J. Duquette
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Publication number: 20200333964Abstract: Secure access to data on a storage system via direct connection to an internal fabric of the storage system may be provided. A storage system interface (SSI) may validate each I/O communication originating on the host system before allowing a corresponding I/O communication to be transmitted on the internal fabric. The validation may include applying predefined rules and/or ensuring that the I/O communication conforms to one or more technologies, e.g., NVMe. The SSI may be configured to encrypt I/O communications originating on a host system and to decrypt I/O communications received from the storage system, for example, in embodiments in which data is encrypted in flight from the host system to physical storage devices, and data may be encrypted at rest in memory of the storage system and/or on physical storage devices.Type: ApplicationFiled: April 19, 2019Publication date: October 22, 2020Applicant: EMC IP Holding Company LLCInventors: Ian Wigmore, Alesia A. Tringale, Jason J. Duquette
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Patent number: 10795612Abstract: Offload processing may be provided that is not dedicated to a primary processor or a subset of primary processors. A system may have one or more offload processors, for example, GPUs, coupled to data storage slots of the system, which can be shared by multiple primary processors of the system. The offload processor(s) may be housed within a device configured to be coupled to a storage slot, for example, as if the device were a storage drive. The one or more offload processors may be housed within a device that includes an interface in conformance with a version of an NVMe specification and may have a form factor in accordance with the U.2 specification. Offload processing devices may be communicatively coupled to one or more primary processors by switching fabric disposed between the one or more primary processors and the storage slot to which the offload processing device is connected.Type: GrantFiled: July 31, 2018Date of Patent: October 6, 2020Assignee: EMC IP Holding Company LLCInventors: Jon I Krasner, Jason J. Duquette, Jonathan P. Sprague
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Patent number: 10740259Abstract: A host system may include metadata mapping logical storage devices and logical addresses therein to physical storage devices and physical addresses therein. For a read operation, the host system, if it is determined that the data is not in cache on the storage system, the host system may determine, from the device-mapping metadata, the physical storage device and physical location (e.g., address range) therein of the data to be read. The data then may be read from the physical storage device over the internal fabric of the storage system without use of a director. Data may be read from the physical storage device to the host system using RDMA communications that do not involve use of any CPU resources on the host system or the storage system.Type: GrantFiled: April 19, 2019Date of Patent: August 11, 2020Assignee: EMC IP Holding Company LLCInventors: Ian Wigmore, Alesia A. Tringale, Jason J. Duquette
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Publication number: 20200226027Abstract: Offload processing may be provided that is not dedicated to a primary processor or a subset of primary processors. A system may have one or more offload processing devices, including one or more APUs, coupled to data storage slots of the system, which can be shared by multiple primary processors of the system. Each offload processing device may be configured to be coupled to a storage slot, for example, as if the device were a storage drive, and include an interface in conformance with a version of an NVMe specification and may have a form factor in accordance with the U.2 specification. The APU within each offload processing device may be communicatively coupled to one or more primary processors by switching fabric disposed between the one or more primary processors and the storage slot to which the offload processing device is connected.Type: ApplicationFiled: January 15, 2019Publication date: July 16, 2020Applicant: EMC IP Holding Company LLCInventors: Jon I. Krasner, Jonathan P. Sprague, Jason J. Duquette
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Patent number: 10698613Abstract: A host system performs I/O processing functions traditionally performed on storage systems. Metadata about data stored on the storage system may be stored on the host system, including metadata about the data stored in a cache of the storage system. The SSI may be configured to determine whether an I/O operation is a read or write operation. If the I/O operation is a read operation, the SSI may determine from metadata stored thereon whether the data to be read is in cache. If the data is in cache, the SSI may read the data directly from cache over the internal fabric without use of CPU resources of a director, and, in some embodiments, without use of a director at all. If the data is not in cache, the SSI may read the data directly from the physical storage device over the internal fabric without use of a director.Type: GrantFiled: April 19, 2019Date of Patent: June 30, 2020Assignee: EMC IP Holding Company LLCInventors: Ian Wigmore, Alesia A. Tringale, Jason J. Duquette
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Patent number: 10698844Abstract: A storage system interface (SSI) located externally to a data storage system serves as an interface between a host system and the data storage system. The SSI may be part of the host system, and in some embodiments may be a separate and discrete component from the remainder of the host system, physically connected to the remainder of the host system by one or more buses that connect periphery devices to the remainder of the host system. The SSI may be physically connected directly to the internal fabric of the data storage system, and may be implemented on a card or chipset physically connected to the remainder of a host system by a PCIe bus. The SSI may provide functionality traditionally provided on data storage systems, enabling at least some I/O processing to be offloaded from data storage systems to hosts that include SSIs.Type: GrantFiled: April 19, 2019Date of Patent: June 30, 2020Assignee: EMC IP Holding Company LLCInventors: Ian Wigmore, Alesia A. Tringale, Jason J. Duquette