Abstract: A modular trench drain system with sloping overlay rails. A non-sloping section of trench drain is transformed into a sloping trench drain by installing sloping overlay rails. The overlay rails rest on the top of the upper edge of the sidewalls and may have a ledge which allows grating, which spans across the channel, to rest on top. The modular channel sections may be held together and in place by a channel bracket with holes for accepting support rods which further secure the channels in place before and after the concrete has been poured and cured around the channels.

Abstract: A modular trench drain system with sloping overlay rails. A non-sloping section of trench drain is transformed into a sloping trench drain by installing sloping overlay rails. The overlay rails rest on the top of the upper edge of the sidewalls and may have a ledge which allows grating, which spans across the channel, to rest on top. The modular channel sections may be held together and in place by a channel bracket with holes for accepting support rods which further secure the channels in place before and after the concrete has been poured and cured around the channels.

Abstract: In some embodiments, a method and apparatus for a multi-mode I/O interface are described. In one embodiment, the interface includes a transmit state machine that generates a state signal indicating a state of the I/O interface in a next clock cycle. A pattern generator includes pattern generation units that select, in response to the state signal and an I/O protocol signal, N-bit interface control patterns from a plurality of microcode N-bit interface control patterns contained in the pattern generation units. A serialization unit then serializes the selected N-bit interface control patterns. A synchronization unit synchronizes the control patterns into a control clock domain to form interface control signals that are transmitted to data buffers and strobe buffers to enable transmission and receipt of data in accordance with an I/O protocol indicated by the I/O protocol signal. Other embodiments are described and claimed.

Abstract: In some embodiments, a method and apparatus for a multi-mode I/O interface are described. In one embodiment, the interface includes a transmit state machine that generates a state signal indicating a state of the I/O interface in a next clock cycle. A pattern generator includes pattern generation units that select, in response to the state signal and an I/O protocol signal, N-bit interface control patterns from a plurality of microcode N-bit interface control patterns contained in the pattern generation units. A serialization unit then serializes the selected N-bit interface control patterns. A synchronization unit synchronizes the control patterns into a control clock domain to form interface control signals that are transmitted to data buffers and strobe buffers to enable transmission and receipt of data in accordance with an I/O protocol indicated by the I/O protocol signal. Other embodiments are described and claimed.

Abstract: A multi-mode I/O interface includes a transmit state machine receiving a core clock signal, a control clock signal and a transmit signal. The state machine generates a state signal indicating a state of the I/O interface in a next clock cycle. A pattern generator includes pattern generation units. Each pattern generation unit selects, in response to the state signal and an I/O protocol signal, N-bit interface control patterns from a plurality of microcode N-bit interface control patterns contained in the pattern generation units. A serialization unit then serializes the selected N-bit interface control patterns. A synchronization unit synchronizes the control patterns into a control clock domain to form interface control signals generated by the multi-mode I/O interface. The interface control signals are transmitted to data buffers and strobe buffers to enable transmission and receipt of data in accordance with an I/O protocol indicated by the I/O protocol signal.

Abstract: A multi-mode I/O interface includes a transmit state machine receiving a core clock signal, a control clock signal and a transmit signal. The state machine generates a state signal indicating a state of the I/O interface in a next clock cycle. A pattern generator includes pattern generation units. Each pattern generation unit selects, in response to the state signal and an I/O protocol signal, N-bit interface control patterns from a plurality of microcode N-bit interface control patterns contained in the pattern generation units. A serialization unit then serializes the selected N-bit interface control patterns. A synchronization unit synchronizes the control patterns into a control clock domain to form interface control signals generated by the multi-mode I/O interface. The interface control signals are transmitted to data buffers and strobe buffers to enable transmission and receipt of data in accordance with an I/O protocol indicated by the I/O protocol signal.