Abstract: Some embodiments includes a digital control system having a microcontroller for handling timed events, a command decoder for interpreting user commands, a separate burst controller for handling burst reads of the Flash memory, a program buffer for handling page writes to the Flash memory, a page transfer controller for handling data transfers from the Flash core to the program buffer as well as address control for page writes from the program buffer to the Flash memory, a memory control register block for storing and adjusting memory control, and memory test mode signals, a memory plane interface for multiplexing addresses into the Flash memory and accelerating program, erase, and recovery verification, and an I/O Mux module for multiplexing data out of the system, and a general purpose I/O port (GPIO) that can be read and written by the microcontroller for use in test and debug. Other embodiments are described.

Abstract: A digital control system including a microcontroller for handling timed events, a command decoder for interpreting user commands, a separate burst controller for handling burst reads of the Flash memory, a program buffer for handling page writes to the Flash memory, a page transfer controller for handling data transfers from the Flash core to the program buffer as well as address control for page writes from the program buffer to the Flash memory, a memory control register block for storing and adjusting memory control and memory test mode signals, a memory plane interface for multiplexing addresses into the Flash memory and accelerating program, erase, and recovery verification, and an I/O Mux module for multiplexing data out of the system, and a general purpose I/O port (GPIO) that can be read and written by the microcontroller for use in test and debug.

Abstract: A digital control system including a microcontroller for handling timed events, a command decoder for interpreting user commands, a separate burst controller for handling burst reads of the Flash memory, a program buffer for handling page writes to the Flash memory, a page transfer controller for handling data transfers from the Flash core to the program buffer as well as address control for page writes from the program buffer to the Flash memory, a memory control register block for storing and adjusting memory control and memory test mode signals, a memory plane interface for multiplexing addresses into the Flash memory and accelerating program, erase, and recovery verification, and an I/O Mux module for multiplexing data out of the system, and a general purpose I/O port (GPIO) that can be read and written by the microcontroller for use in test and debug.