Abstract: Embodiments of the present disclosure generally relate to an improved method for forming a dielectric film stack used for inter-level dielectric (ILD) layers in a 3D NAND structure. In one embodiment, the method comprises providing a substrate having a gate stack deposited thereon, forming on exposed surfaces of the gate stack a first oxide layer using a first RF power and a first process gas comprising a TEOS gas and a first oxygen-containing gas, and forming over the first oxide layer a second oxide layer using a second RF power and a second process gas comprising a silane gas and a second oxygen-containing gas.

Abstract: Embodiments of the present disclosure provide an electrostatic chuck for maintaining a flatness of a substrate being processed in a plasma reactor at high temperatures. In one embodiment, the electrostatic chuck comprises a chuck body coupled to a support stem, the chuck body having a substrate supporting surface, and the chuck body has a volume resistivity value of about 1×107 ohm-cm to about 1×1015 ohm-cm in a temperature of about 250° C. to about 700° C., and an electrode embedded in the body, the electrode is coupled to a power supply. In one example, the chuck body is composed of an aluminum nitride material which has been observed to be able to optimize chucking performance around 600° C. or above during a deposition or etch process, or any other process that employ both high operating temperature and substrate clamping features.

Abstract: Embodiments of the present disclosure generally relate to an improved method for forming a dielectric film stack used for inter-level dielectric (ILD) layers in a 3D NAND structure. In one embodiment, the method comprises providing a substrate having a gate stack deposited thereon, forming on exposed surfaces of the gate stack a first oxide layer using a first RF power and a first process gas comprising a TEOS gas and a first oxygen-containing gas, and forming over the first oxide layer a second oxide layer using a second RF power and a second process gas comprising a silane gas and a second oxygen-containing gas.

Abstract: Embodiments of the present disclosure generally relate to an improved method for forming a dielectric film stack used for inter-level dielectric (ILD) layers in a 3D NAND structure. In one embodiment, the method comprises providing a substrate having a gate stack deposited thereon, forming on exposed surfaces of the gate stack a first oxide layer using a first RF power and a first process gas comprising a TEOS gas and a first oxygen-containing gas, and forming over the first oxide layer a second oxide layer using a second RF power and a second process gas comprising a silane gas and a second oxygen-containing gas.

Abstract: Embodiments of the present disclosure generally relate to an improved method for forming a dielectric film stack used for inter-level dielectric (ILD) layers in a 3D NAND structure. In one embodiment, the method comprises providing a substrate having a gate stack deposited thereon, forming on exposed surfaces of the gate stack a first oxide layer using a first RF power and a first process gas comprising a TEOS gas and a first oxygen-containing gas, and forming over the first oxide layer a second oxide layer using a second RF power and a second process gas comprising a silane gas and a second oxygen-containing gas.

Abstract: Embodiments of the present disclosure provide an electrostatic chuck for maintaining a flatness of a substrate being processed in a plasma reactor at high temperatures. In one embodiment, the electrostatic chuck comprises a chuck body coupled to a support stem, the chuck body having a substrate supporting surface, and the chuck body has a volume resistivity value of about 1×107 ohm-cm to about 1×1015 ohm-cm in a temperature of about 250° C. to about 700° C., and an electrode embedded in the body, the electrode is coupled to a power supply. In one example, the chuck body is composed of an aluminum nitride material which has been observed to be able to optimize chucking performance around 600° C. or above during a deposition or etch process, or any other process that employ both high operating temperature and substrate clamping features.

Abstract: Methods for detecting valve leakage and apparatus for the same are provided. In one embodiment, a method for detecting a valve leakage includes flowing a gas through a diverter valve, determining a pressure in a gas source provided to the diverter valve, comparing the determined pressure value with an expected pressure value, and generating a signal in response to the comparison.

Abstract: Systems, methods and apparatus are provided for moving substrates in electronic device manufacturing. In some aspects, end effectors having a base portion and at least three pads are provided. Each of the pads has a contact surface, and at least one of the contact surfaces has a curved shape. A substrate supported by the end effector may be moved at a relatively high lateral g-force without significant slipping relative to the pads. Additional aspects are provided.