Patents by Inventor Jason Lee Pack

Jason Lee Pack has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11474547
    Abstract: A scheme is provided for dynamically adjusting an amount of power drawn from individual power sources to optimize the power usage without violating power limits. Coarse adjustment is provided through dynamic phase reallocation while a fine adjustment is provided through dynamic current steering. By adding a control loop around current steering techniques in digital voltage regulator controllers, power drawn from multiple input rails is balanced. The apparatus allows users to maximize the power delivered to discrete graphics cards without violating PCIe specifications. This allows maximum performance with minimal bill-of-material (BOM) cost.
    Type: Grant
    Filed: February 14, 2020
    Date of Patent: October 18, 2022
    Assignee: Intel Corporation
    Inventors: Darryl Tschirhart, Alan Wu, Jason Lee Pack, Yvan Large, Sanjeev Jahagirdar
  • Publication number: 20220113774
    Abstract: An apparatus is described. The apparatus includes an add-in card having a power connector to receive power other than through the add-in card's host connector. The power connector fitted in a notch of a printed circuit board of the add-in card so that, when the printed circuit board is oriented to have an upper surface with semiconductor chips disposed thereon, an upper surface of the connector is above the upper surface of the printed circuit board and a lower surface of the connector is below a lower surface of the printed circuit board.
    Type: Application
    Filed: December 20, 2021
    Publication date: April 14, 2022
    Inventors: Shahin AMIRI, Mirui WANG, Evan PANG, Robert SCHUM, Shahed SAFAVI-BAYAT, Xuefeng MA, Jason LEE PACK, Yvan LARGE
  • Publication number: 20220117122
    Abstract: An apparatus is described. The apparatus includes a semiconductor chip package having a semiconductor chip therein. The semiconductor chip package to communicate a temperature of the semiconductor chip. The apparatus includes a heat sink that is thermally coupled to the semiconductor chip package. The heat sink has fins. The apparatus includes a fan. The apparatus includes a temperature sensing device. The temperature sensing device is to sense a temperature of an ambient before the ambient is warmed by the fins. A rotational speed of the fan is to be determined from the temperature of the semiconductor chip and the temperature of the ambient.
    Type: Application
    Filed: December 17, 2021
    Publication date: April 14, 2022
    Inventors: Ali KALANTARIAN, Malcolm GUTENBURG, Andrew RANDELL, Mirui WANG, Tejas SHAH, Tamara J. LOW FOON, Jason LEE PACK, Yvan LARGE, Shahin AMIRI, Saanjali MAHARAJ, Srinivasarao KONAKALLA, Feroze KHAN, Nagaraj K, Babu TRIPLICANE GOPIKRISHNAN, Yogesh CHANNAIAH
  • Publication number: 20210255650
    Abstract: A scheme is provided for dynamically adjusting an amount of power drawn from individual power sources to optimize the power usage without violating power limits. Coarse adjustment is provided through dynamic phase reallocation while a fine adjustment is provided through dynamic current steering. By adding a control loop around current steering techniques in digital voltage regulator controllers, power drawn from multiple input rails is balanced. The apparatus allows users to maximize the power delivered to discrete graphics cards without violating PCIe specifications. This allows maximum performance with minimal bill-of-material (BOM) cost.
    Type: Application
    Filed: February 14, 2020
    Publication date: August 19, 2021
    Applicant: Intel Corporation
    Inventors: Darryl Tschirhart, Alan Wu, Jason Lee Pack, Yvan Large, Sanjeev Jahagirdar