Abstract: A method for patterning includes having a substrate including a first layer, a second layer to-be-patterned disposed under the first layer, and a third layer disposed under the second layer, the first layer including a plurality of lines, each of the plurality of lines being separated by a recess, a bottom of the recess exposing a surface of the second layer; exposing the substrate to a first plasma to extend the recesses through the second layer to expose a surface of the third layer, the first plasma being generated from a first halogen based gas and a first oxidizing gas, the first halogen based gas including a carbon-containing halogen based gas; and laterally etching the recesses in the second layer using a second plasma, the second plasma being generated from a second halogen based gas and a second oxidizing gas, the second halogen based gas being a carbon-free halogen based gas.

Abstract: A method includes providing a semiconductor substrate and forming a fin protruding from the semiconductor substrate. The method includes forming a silicon-containing layer over the fin. The method further includes patterning the silicon-containing layer to form a gate structure over the fin, where patterning the silicon-containing layer is implemented using an etchant and a passivant that includes a silicon-containing gas and a nitrogen-containing gas.

Abstract: A method includes providing a semiconductor substrate and forming a dielectric layer over the semiconductor substrate. The method includes forming a metal layer over the dielectric layer. The method includes forming a patterned mask over the metal layer. The method includes performing a first etching process using a first etchant to form metal patterns separated by trenches in the metal layer. The method further includes performing a second etching process using a second etchant and a passivant to extend the trenches in the dielectric layer, resulting in a passivation layer formed along sidewalls of the metal patterns.

Abstract: A method for fabricating a semiconductor device includes forming a pattern of trenches by etching a first layer formed over an underlying layer of a substrate, each of the trenches having an aspect ratio (AR) in a range with a lower limit of a first AR and an upper limit of a second AR, the pattern including a low-AR trench having the first AR and a high-AR trench having the second AR, the AR of a trench being a ratio of its depth to its opening width, the etching including: executing a first recipe in a plasma chamber to anisotropically etch the first layer for a first duration by flowing etchants through the chamber, an etch rate of the first layer being higher on the low-AR trench relative to that on the high-AR trench; and after executing the first recipe, executing a second recipe in the plasma chamber to etch the first layer anisotropically and concurrently deposit oxygen-containing etch byproducts to passivate exposed portions of sides of the trenches, the etch rate of the first layer being lower on th

Abstract: Methods are disclosed to detect plasma light emissions during plasma processing, to analyze light intensity data associated with the plasma source, and to adjust operating parameters for the plasma source and/or the process chamber based upon light intensity distributions associated with the plasma processing. The light intensity distributions for the plasma sources and related analysis can be conducted across multiple processing tools. For some embodiments, plasma discharge stability and/or chamber-to-chamber matching information is determined based upon light intensity data, and the operation of the processing tools are adjusted or controlled based upon stability and/or matching determinations. The disclosed embodiments thereby provide simple, low-cost solutions to assess and improve plasma sources and discharge stability for plasma processing tools such as plasma etch and deposition tools.

Abstract: Systems and methods are disclosed for plasma discharge ignition to reduce surface particles and thereby decrease defects introduced during plasma processing. A microelectronic workpiece is positioned on a holder within a process chamber that includes a first radio frequency (RF) power source configured to couple RF power to a top portion of the process chamber, a second RF power source configured to couple RF power to the holder, and a direct current (DC) power supply. Initially, a process gas for plasma process is flowed into the process chamber. The process gas is ignited to form plasma by activating the second RF power source to apply RF power to the holder. Subsequently, the microelectronic workpiece is clamped to the holder by applying the positive voltage to the holder with the DC power supply, and the first RF power source is activated to maintain the plasma within the process chamber.

Abstract: Provided are methods and systems for operation instability detection in a surface wave plasma source. In an embodiment a system for plasma processing may include a surface wave plasma source configured to generate a plasma field. The system may also include an optical sensor configured to generate information characteristic of optical energy collected in a region proximate to the surface wave plasma source. Additionally, the system may include a sensor logic unit configured to detect a region of instability proximate to the surface wave plasma source in response to the information generated by the optical sensor.

Abstract: Methods are disclosed to detect plasma light emissions during plasma processing, to analyze light intensity data associated with the plasma source, and to adjust operating parameters for the plasma source and/or the process chamber based upon light intensity distributions associated with the plasma processing. The light intensity distributions for the plasma sources and related analysis can be conducted across multiple processing tools. For some embodiments, plasma discharge stability and/or chamber-to-chamber matching information is determined based upon light intensity data, and the operation of the processing tools are adjusted or controlled based upon stability and/or matching determinations. The disclosed embodiments thereby provide simple, low-cost solutions to assess and improve plasma sources and discharge stability for plasma processing tools such as plasma etch and deposition tools.

Abstract: Manufacturing methods are disclosed to reduce surface particle impurities after a plasma process (e.g., etch, deposition, etc.) by repelling particles trapped within particle wells to reduce surface particle impurities on microelectronic workpieces after termination of the plasma process. Rather than turn off pressure and source power at the termination of the plasma process, the disclosed embodiments first enter a sequence to adjust process parameters to repel particles in a particle well in order to reduce or eliminate the particle well prior to terminating the plasma process. During this particle repel sequence, certain disclosed embodiments adjust parameters to maintain an electrostatic field above the surface of the wafer utilizing low plasma density and ion energy conditions that help to repel particles from the microelectronic workpiece. The disclosed methods allow for the particle well to be exhausted well prior to the collapse of electrostatic forces when the plasma process is terminated.

Abstract: Described herein is a technology related to a method for utilizing a dual-frequency surface wave plasma sources to provide stable ionizations on a plasma processing system. Particularly, the dual-frequency surface wave plasma sources may include a primary surface wave power plasma source and a secondary power plasma source, which is provided on each recess of a plurality of recesses. The secondary power plasma source, for example, may provide the stable ionization on the plasma processing system.

Abstract: Systems and methods are disclosed for plasma discharge ignition to reduce surface particles and thereby decrease defects introduced during plasma processing. A microelectronic workpiece is positioned on a holder within a process chamber that includes a first radio frequency (RF) power source configured to couple RF power to a top portion of the process chamber, a second RF power source configured to couple RF power to the holder, and a direct current (DC) power supply. Initially, a process gas for plasma process is flowed into the process chamber. The process gas is ignited to form plasma by activating the second RF power source to apply RF power to the holder. Subsequently, the microelectronic workpiece is clamped to the holder by applying the positive voltage to the holder with the DC power supply, and the first RF power source is activated to maintain the plasma within the process chamber.

Abstract: Described herein is a technology related to a method for utilizing a dual-frequency surface wave plasma sources to provide stable ionizations on a plasma processing system. Particularly, the dual-frequency surface wave plasma sources may include a primary surface wave power plasma source and a secondary power plasma source, which is provided on each recess of a plurality of recesses. The secondary power plasma source, for example, may provide the stable ionization on the plasma processing system.

Abstract: Provided are methods and systems for operation instability detection in a surface wave plasma source. In an embodiment a system for plasma processing may include a surface wave plasma source configured to generate a plasma field. The system may also include an optical sensor configured to generate information characteristic of optical energy collected in a region proximate to the surface wave plasma source. Additionally, the system may include a sensor logic unit configured to detect a region of instability proximate to the surface wave plasma source in response to the information generated by the optical sensor.

Abstract: A plasma processing method and apparatus are provided in which current spikes associated with application of a voltage to an electrostatic chuck (ESC) are minimized or reduced when the processing plasma is present. According to an example, the voltage is applied to the ESC after the processing plasma is struck, however the voltage is ramped or increased in a step-wise manner to achieve the desired final ESC voltage. In an alternate embodiment, the ESC voltage is at least partially applied before striking of the plasma for processing the wafer. By reducing current spikes associated with application of the voltage to the ESC during the presence of the processing plasma, transfer or deposition of particles on the wafer can be reduced.

Abstract: A plasma processing method and apparatus are provided in which current spikes associated with application of a voltage to an electrostatic chuck (ESC) are minimized or reduced when the processing plasma is present. According to an example, the voltage is applied to the ESC after the processing plasma is struck, however the voltage is ramped or increased in a step-wise manner to achieve the desired final ESC voltage. In an alternate embodiment, the ESC voltage is at least partially applied before striking of the plasma for processing the wafer. By reducing current spikes associated with application of the voltage to the ESC during the presence of the processing plasma, transfer or deposition of particles on the wafer can be reduced.

Abstract: A support assembly for supporting a moveable member of an agricultural combine is provided. The support assembly includes a moveable member, such as a foldable chaff pan assembly for spreading chaff and other crop residue from the rear of an agricultural combine, a support member and a resilient member connected to the support member for supporting the moveable member. The resilient member can be configured as an arched shaped or cylindrically shaped member.