Abstract: Methods and systems for improved control of traffic generated by a processor are described. In an embodiment, when a device generates a pre-fetch request for a piece of data or an instruction from a memory hierarchy, the device includes a pre-fetch identifier in the request. This identifier flags the request as a pre-fetch request rather than a non-pre-fetch request, such as a time-critical request. Based on this identifier, the memory hierarchy can then issue an abort response at times of high traffic which suppresses the pre-fetch traffic, as the pre-fetch traffic is not fulfilled by the memory hierarchy. On receipt of an abort response, the device deletes at least a part of any record of the pre-fetch request and if the data/instruction is later required, a new request is issued at a higher priority than the original pre-fetch request.

Abstract: A system and method for controlling the operation of heating, ventilating, and air conditioning (HVAC) equipment so as to achieve a desired range of a sound pressure level and/or a sound power level is described. The system and method can lead to a desired range of a sound pressure level and/or a sound power level for a zone using equipment that is typically included in HVAC systems. Such control of equipment can be important for privacy and comfort requirements.

Abstract: An improved mechanism for copying data in memory is described which uses aliasing. In an embodiment, data is accessed from a first location in a memory and stored in a cache line associated with a second, different location in the memory. In response to a subsequent request for data from the second location in the memory, the cache returns the data stored in the cache line associated with the second location in the memory. The method may be implemented using additional hardware logic in the cache which is arranged to receive an aliasing request from a processor which identifies both the first and second locations in memory and triggers the accessing of data from the first location for storing in a cache line associated with the second location.

Abstract: Methods and systems for improved control of traffic generated by a processor are described. In an embodiment, when a device generates a pre-fetch request for a piece of data or an instruction from a memory hierarchy, the device includes a pre-fetch identifier in the request. This identifier flags the request as a pre-fetch request rather than a non-pre-fetch request, such as a time-critical request. Based on this identifier, the memory hierarchy can then issue an abort response at times of high traffic which suppresses the pre-fetch traffic, as the pre-fetch traffic is not fulfilled by the memory hierarchy. On receipt of an abort response, the device deletes at least a part of any record of the pre-fetch request and if the data/instruction is later required, a new request is issued at a higher priority than the original pre-fetch request.

Abstract: Methods and systems for improved control of traffic generated by a processor are described. In an embodiment, when a device generates a pre-fetch request for a piece of data or an instruction from a memory hierarchy, the device includes a pre-fetch identifier in the request. This identifier flags the request as a pre-fetch request rather than a non-pre-fetch request, such as a time-critical request. Based on this identifier, the memory hierarchy can then issue an abort response at times of high traffic which suppresses the pre-fetch traffic, as the pre-fetch traffic is not fulfilled by the memory hierarchy. On receipt of an abort response, the device deletes at least a part of any record of the pre-fetch request and if the data/instruction is later required, a new request is issued at a higher priority than the original pre-fetch request.

Abstract: Fill partitioning of a shared cache is described. In an embodiment, all threads running in a processor are able to access any data stored in the shared cache; however, in the event of a cache miss, a thread may be restricted such that it can only store data in a portion of the shared cache. The restrictions to storing data may be implemented for all cache miss events or for only a subset of those events. For example, the restrictions may be implemented only when the shared cache is full and/or only for particular threads. The restrictions may also be applied dynamically, for example, based on conditions associated with the cache. Different portions may be defined for different threads (e.g. in a multi-threaded processor) and these different portions may, for example, be separate and non-overlapping. Fill partitioning may be applied to any on-chip cache, for example, a L1 cache.

Abstract: A plenum with features to disperse acoustic energy in an airflow while maintaining a relatively small pressure drop in the airflow is disclosed. A general structure of the plenum may include a perforated airflow passage surrounded by a substantially large space enclosed between the airflow passage and a plenum. The perforated airflow passage has a perforated wall that may allow the acoustic energy to be dispersed into the substantially large space when flowing through the airflow passage. Acoustic energy dispersing materials may also be disposed in the substantially large space and/or on the perforated wall to help disperse acoustic energy by, for example, absorbing the acoustic energy. The plenum can help disperse the acoustic energy while helping minimize the pressure drop in the airflow.

Abstract: Aspects relate to methods and systems for processing requests and sending data in a bus architecture. At least one master device is connected to at least two slave devices via a bus. An allocator allocates incoming requests from the master device to a target slave device. Incoming requests are buffered for the respective slave device. The master device sends a read request for a first slave device to the bus; the allocator generates a current-state indicator associated with the read request. The allocator generates a priority indicator associated with the read request. If the initial value of the current-state indicator equals the value of the priority indicator, the read request is processed; or if the initial value of the current-state indicator does not equal the value of priority indicator, the read request is deferred until a later time.

Abstract: A plenum with features to disperse acoustic energy in an airflow while maintaining a relatively small pressure drop in the airflow is disclosed. A general structure of the plenum may include a perforated airflow passage surrounded by a substantially large space enclosed between the airflow passage and a plenum. The perforated airflow passage has a perforated wall that may allow the acoustic energy to be dispersed into the substantially large space when flowing through the airflow passage. Acoustic energy dispersing materials may also be disposed in the substantially large space and/or on the perforated wall to help disperse acoustic energy by, for example, absorbing the acoustic energy. The plenum can help disperse the acoustic energy while helping minimize the pressure drop in the airflow.

Abstract: A plenum with features to disperse acoustic energy in an airflow while maintaining a relatively small pressure drop in the airflow is disclosed. A general structure of the plenum may include a perforated airflow passage surrounded by a substantially large space enclosed between the airflow passage and a plenum. The perforated airflow passage has a perforated wall that may allow the acoustic energy to be dispersed into the substantially large space when flowing through the airflow passage. Acoustic energy dispersing materials may also be disposed in the substantially large space and/or on the perforated wall to help disperse acoustic energy by, for example, absorbing the acoustic energy. The plenum can help disperse the acoustic energy while helping minimize the pressure drop in the airflow.

Abstract: A system and method for controlling the operation of heating, ventilating, and air conditioning (HVAC) equipment so as to achieve a desired range of a sound pressure level and/or a sound power level is described. The system and method can lead to a desired range of a sound pressure level and/or a sound power level for a zone using equipment that is typically included in HVAC systems. Such control of equipment can be important for privacy and comfort requirements.

Abstract: Methods of increasing the efficiency of memory resources within a processor are described. In an embodiment, instead of including dedicated DSP indirect register resource for storing data associated with DSP instructions, this data is stored in an allocated and locked region within the cache. The state of any cache lines which are used to store DSP data is then set to prevent the data from being written to memory. The size of the allocated region within the cache may vary according to the amount of DSP data that needs to be stored and when no DSP instructions are being run, no cache resources are allocated for storage of DSP data.

Abstract: Methods and systems for improved control of traffic generated by a processor are described. In an embodiment, when a device generates a pre-fetch request for a piece of data or an instruction from a memory hierarchy, the device includes a pre-fetch identifier in the request. This identifier flags the request as a pre-fetch request rather than a non-pre-fetch request, such as a time-critical request. Based on this identifier, the memory hierarchy can then issue an abort response at times of high traffic which suppresses the pre-fetch traffic, as the pre-fetch traffic is not fulfilled by the memory hierarchy. On receipt of an abort response, the device deletes at least a part of any record of the pre-fetch request and if the data/instruction is later required, a new request is issued at a higher priority than the original pre-fetch request.

Abstract: A plenum with features to disperse acoustic energy in an airflow while maintaining a relatively small pressure drop in the airflow is disclosed. A general structure of the plenum may include a perforated airflow passage surrounded by a substantially large space enclosed between the airflow passage and a plenum. The perforated airflow passage has a perforated wall that may allow the acoustic energy to be dispersed into the substantially large space when flowing through the airflow passage. Acoustic energy dispersing materials may also be disposed in the substantially large space and/or on the perforated wall to help disperse acoustic energy by, for example, absorbing the acoustic energy. The plenum can help disperse the acoustic energy while helping minimize the pressure drop in the airflow.

Abstract: An improved mechanism for copying data in memory is described which uses aliasing. In an embodiment, data is accessed from a first location in a memory and stored in a cache line associated with a second, different location in the memory. In response to a subsequent request for data from the second location in the memory, the cache returns the data stored in the cache line associated with the second location in the memory. The method may be implemented using additional hardware logic in the cache which is arranged to receive an aliasing request from a processor which identifies both the first and second locations in memory and triggers the accessing of data from the first location for storing in a cache line associated with the second location.

Abstract: Aspects relate to methods and systems for processing requests and sending data in a bus architecture. At least one master device is connected to at least two slave devices via a bus. An allocator allocates incoming requests from the master device to a target slave device. Incoming requests are buffered for the respective slave device. The master device sends a read request for a first slave device to the bus; the allocator generates a current-state indicator associated with the read request. The allocator generates a priority indicator associated with the read request. If the initial value of the current-state indicator equals the value of the priority indicator, the read request is processed; or if the initial value of the current-state indicator does not equal the value of priority indicator, the read request is deferred until a later time.

Abstract: Fill partitioning of a shared cache is described. In an embodiment, all threads running in a processor are able to access any data stored in the shared cache; however, in the event of a cache miss, a thread may be restricted such that it can only store data in a portion of the shared cache. The restrictions to storing data may be implemented for all cache miss events or for only a subset of those events. For example, the restrictions may be implemented only when the shared cache is full and/or only for particular threads. The restrictions may also be applied dynamically, for example, based on conditions associated with the cache. Different portions may be defined for different threads (e.g. in a multi-threaded processor) and these different portions may, for example, be separate and non-overlapping. Fill partitioning may be applied to any on-chip cache, for example, a L1 cache.

Abstract: Aspects relate to methods and systems for processing requests and sending data in a bus architecture. At least one master device is connected to at least two slave devices via a bus. An allocator allocates incoming requests from the master device to a target slave device. Incoming requests are buffered for the respective slave device. The master device sends a read request for a first slave device to the bus; the allocator generates a current-state indicator associated with the read request. The allocator generates a priority indicator associated with the read request. If the initial value of the current-state indicator equals the value of the priority indicator, the read request is processed; or if the initial value of the current-state indicator does not equal the value of priority indicator, the read request is deferred until a later time.

Abstract: A first sensor detects a boom angle of a boom with respect to a support. An attachment is coupled to the boom. A second cylinder is associated with the attachment. A second sensor detects an attachment angle of the attachment with respect to the boom. An accelerometer detects an acceleration or deceleration of the boom. A switch accepts a command to enter a ready position state from another position state. A controller controls the first hydraulic cylinder to attain a boom angle within the target boom angular range and for controlling the second cylinder to attain an attachment angle within the target attachment angular range associated with the ready position state in response to the command in conformity with at least one of a desired boom motion curve and a desired attachment motion curve.

Abstract: Aspects relate to methods and systems for processing requests and sending data in a bus architecture. At least one master device is connected to at least two slave devices via a bus. An allocator allocates incoming requests from the master device to a target slave device. Incoming requests are buffered for the respective slave device. The master device sends a read request for a first slave device to the bus; the allocator generates a current-state indicator associated with the read request. The allocator generates a priority indicator associated with the read request. If the initial value of the current-state indicator equals the value of the priority indicator, the read request is processed; or if the initial value of the current-state indicator does not equal the value of priority indicator, the read request is deferred until a later time.