Patents by Inventor Jason Mix

Jason Mix has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240120651
    Abstract: Photonically steered impedance surface antennas are disclosed. A disclosed example apparatus includes a semiconductor substrate to be communicatively coupled to a radio frequency (RF) source, an at least partially transparent dielectric layer, the semiconductor substrate at a first side of the at least partially transparent dielectric layer, an at least partially transparent conductive film at a second side of the at least partially transparent dielectric layer that is opposite the first side of the at least partially transparent dielectric layer, and an illumination source to illuminate at least a portion of the semiconductor substrate to generate a photoinduced solid-state plasma pattern that beam steers an RF signal corresponding to the RF source.
    Type: Application
    Filed: September 30, 2022
    Publication date: April 11, 2024
    Inventors: Zhen Zhou, Tae Young Yang, Timo Huusari, Renzhi Liu, Wei Qian, Mengyuan Huang, Jason Mix
  • Publication number: 20240007050
    Abstract: An apparatus, system, and method for multi-frequency oscillator control are provided. A circuit can include a resonator circuit including an input and an output, the resonator circuit configured to resonate at a fundamental frequency and a different, non-fundamental frequency, a startup circuit electrically coupled to the input, the startup circuit configured to generate a signal at about the non-fundamental frequency and detect when the resonator circuit is resonating at the non-fundamental frequency, and an oscillator driver circuit electrically coupled to the output, the oscillator driver circuit configured to amplify and buffer the output of resonator circuit and drive a load.
    Type: Application
    Filed: June 30, 2022
    Publication date: January 4, 2024
    Inventors: Timo Huusari, Mohamed A. Abdelmoneum, Brent R. Carlton, Somnath Kundu, Hao Luo, Sarah Shahraini, Jason Mix, Eduardo Alban
  • Publication number: 20230369289
    Abstract: Embodiments of a microelectronic assembly comprise a package substrate, a first integrated circuit (IC) die, a second IC die between the first IC die and the package substrate, a dielectric material between the first IC die and the package substrate, and a plurality of vias through the dielectric material, the vias coupling the first IC die and the package substrate. The microelectronic assembly is in a space defined by three mutually orthogonal axes, a first axis, a second axis and a third axis; the package substrate, the first IC die and the second IC die are mutually parallel in first planes defined by the first axis and the third axis; the vias are in one or more second planes defined by the second axis and the third axis; and the vias are inclined at an angle not equal to ninety degrees around the first axis.
    Type: Application
    Filed: May 12, 2022
    Publication date: November 16, 2023
    Applicant: Intel Corporation
    Inventors: Jong-Ru Guo, Zhen Zhou, Jason Mix, Chia-Pin Chiu, Zuoguo Wu
  • Publication number: 20230085673
    Abstract: An electronic device and associated methods are disclosed. In one example, the electronic device includes a MEMS die located within a substrate, and below a processor die. In selected examples, the MEMS die includes a resonator. Example methods of forming MEMS resonator devices are also shown.
    Type: Application
    Filed: September 22, 2021
    Publication date: March 23, 2023
    Inventors: Mohamed A. Abdelmoneum, Eduardo Alban, Whitney Bryks, Brent R. Carlton, Tarek A. Ibrahim, Nasser A. Kurd, Jason Mix, Srinivas Venkata Ramanuja Pietambaram, Sarah Shahraini
  • Patent number: 11611346
    Abstract: Techniques and mechanisms for regulating a temperature of a resonator structure. In an embodiment, a thermoelectric cooler (TEC) is thermally coupled to a resonator which is proximate thereto. The resonator supports operation with an oscillator circuit, wherein a resonance characteristic of the resonator contributes to oscillations of a master clock signal, or other oscillatory signal, which is provided with the oscillator circuit. The TEC provides Peltier functionality to selectively perform either one of heating or cooling the resonator. In another embodiment, the TEC is configured to conduct heat which is transferred via a path between the TEC and the resonator, wherein the path omits any circuitry which is to perform operations which are synchronized based on the oscillatory signal.
    Type: Grant
    Filed: June 21, 2019
    Date of Patent: March 21, 2023
    Assignee: Intel Corporation
    Inventors: Catharina Biber, Jason Mix, Mark Carbone, Mohamed A. Abdelmoneum, Joshua Linden Levy, Timo Huusari, Sarah Shahraini
  • Publication number: 20220416428
    Abstract: Various embodiments provide systems, devices, and methods for an antenna assembly included in an integrated circuit (IC) package. The antenna assembly may be used for near field wireless communication such as package-to-package and/or chip-to-chip communication. The antenna assembly may include a feed plate (e.g., a top feed) that is capacitively coupled to a first via and a second via. The feed plate may further be capacitively coupled to a loading structure. The first via may be conductively coupled to a ground potential. In some embodiments, the antenna assembly may further include a stub structure (e.g., an open stub or a short stub) that is conductively coupled to the second via. An impedance matching network may be coupled between the feed plate and an IC die that communicates using the antenna assembly. Other embodiments may be described and claimed.
    Type: Application
    Filed: June 24, 2021
    Publication date: December 29, 2022
    Inventors: Zhen Zhou, Tae Young Yang, Shuhei Yamada, Tolga Acikalin, Johanny Escobar Pelaez, Kenneth Foust, Jason Mix, Renzhi Liu
  • Publication number: 20220338344
    Abstract: Methods and apparatus relating to phase heterogeneous interconnects for crosstalk reduction are described. In one embodiment, an interconnect includes a plurality of links. A first set of links from the plurality of links communicates signals and a second set of links from the plurality of links provides a return path. The interconnect also includes one or more links from the first set of links that include one or more structures with a larger diameter than a minimum diameter of the one or more links. The larger diameter modifies an inductance or capacitance of the one or more links to provide a heterogenous phase delay amongst the plurality of links. Other embodiments are also claimed and disclosed.
    Type: Application
    Filed: June 30, 2022
    Publication date: October 20, 2022
    Applicant: Intel Corporation
    Inventors: Zhen Zhou, Gordon Melz, Daqiao Du, Ismael Franco, Jason Mix
  • Publication number: 20200403619
    Abstract: Techniques and mechanisms for regulating a temperature of a resonator structure. In an embodiment, a thermoelectric cooler (TEC) is thermally coupled to a resonator which is proximate thereto. The resonator supports operation with an oscillator circuit, wherein a resonance characteristic of the resonator contributes to oscillations of a master clock signal, or other oscillatory signal, which is provided with the oscillator circuit. The TEC provides Peltier functionality to selectively perform either one of heating or cooling the resonator. In another embodiment, the TEC is configured to conduct heat which is transferred via a path between the TEC and the resonator, wherein the path omits any circuitry which is to perform operations which are synchronized based on the oscillatory signal.
    Type: Application
    Filed: June 21, 2019
    Publication date: December 24, 2020
    Applicant: Intel Corporation
    Inventors: Catharina Biber, Jason Mix, Mark Carbone, Mohamed A. Abdelmoneum, Joshua Linden Levy, Timo Huusari, Sarah Shahraini
  • Publication number: 20050082088
    Abstract: The invention relates to an apparatus and method for improving coupling across plane discontinuities on circuit boards. A circuit board includes a discontinuity, e.g., a split, slot, or cutout, formed on a voltage reference plane. A conductive layer overlies the discontinuity. The conductive layer has a first portion connected to the underlying reference plane and a second portion spanning the discontinuity. The first portion is connected to the reference plane using a slot or vias. And the conductive layer has a third portion extending over the reference plane but remaining disconnected from it. The conductive layer might be graphite or carbon black.
    Type: Application
    Filed: November 16, 2004
    Publication date: April 21, 2005
    Inventors: Weston Roth, Jayne Mershon, Xang Moua, Jason Mix