Abstract: A matrix display device (60) comprises an array of pixels for producing a display output in response to drive signal voltages using an inversion drive scheme. Display artefacts, especially flicker, are corrected for by connecting together, in parallel, two pixels (31), previously addressed with respective drive signal voltages of opposite polarity, and measuring a residual voltage caused by a difference in charge stored on the two pixels due to a DC offset present in the pixels. The measured voltage is used to modify subsequent drive signal voltages for the pixels in order to reduce the measured voltage, i.e. towards zero, thus reducing display artefacts caused by the DC offset in the pixels. The invention is particularly applicable to transmissive type liquid crystal display devices.

Abstract: A matrix display device (100) comprises an array of pixels (25) for producing a display output in response to voltages applied by drive circuit means (10,16,68). Each pixel (25) has a cell (18) comprising electro-optical material between two electrodes (5,6), the polarity of the voltage applied across the electrodes of each cell being periodically inverted. The device includes correction means (72) for modifying voltages generated by the drive circuit means (10,16,68) to compensate for display artefacts, such as flicker. The correction means comprises a measurement pixel (25a) and means for generating for each of the voltage polarities applied across the electrodes (18a) of the cells (18) a respective signal indicative of the capacitance of the measurement pixel cell, the correction means (72) modifying voltages generated by the drive circuit means (10,16,68) in response to said signals.

Abstract: A display has circuitry (50) which generates all possible pixel drive signal levels on separate signal level lines. A buffer (54) is associated with each signal level line. The outputs of the buffers are selectably switchable onto the columns. The signal levels for each column are stored in a memory (72) and the buffers are controlled in dependence on the stored signal levels. The response of the buffers is heavily dependent on the output load, and there is a very large variation in the output load of the buffers (54), as a function of the number of columns to which the buffer output is to be provided. The buffers are controlled in dependence on stored signal levels to ensure stability of the buffers for any output load.

Abstract: A method of driving an active matrix liquid crystal display in a partial display mode is provided, together with a display operable in accordance therewith. A live portion (4) of the display is driven to display image data (6) and a dormant portion (8) is driven to display a substantially constant grey scale level output. The method comprises applying a signal (40) to each of the column address conductors (18) associated with the dormant portion (8) which comprises a combination of a signal substantially the same as the signal (14) applied to the counter electrode and kickback correction, such that the resultant kickback correction applied to each of the picture elements associated with the dormant portion (8) substantially corresponds to the grey scale level of the dormant portion. This serves to reduce the power consumption of the dormant portion (8), whilst avoiding the application of a substantial DC across the picture elements of the dormant portion (8).

Abstract: A display has circuitry (50) which generates all possible pixel drive signal levels on separate signal level lines. A buffer (54) is associated with each signal level line. The outputs of the buffers are selectably switchable onto the columns. The signal levels for each column are stored in a memory (72) and the buffers are controlled in dependence on the stored signal levels. The response of the buffers is heavily dependent on the output load, and there is a very large variation in the output load of the buffers (54), as a function of the number of columns to which the buffer output is to be provided. The buffers are controlled in dependence on stored signal levels to ensure stability of the buffers for any output load.

Abstract: An active matrix display device comprises an array of picture elements, e.g. liquid crystal picture elements, first and second sets of address conductors (16, 18) extending in row and column directions respectively and connected with the picture elements, and a set of connection conductors (30) extending in the same direction as the second set of address conductors (18), each of which is connected to a respective one of the first set of conductors (16) at the location of a picture element, and via which address signals are supplied to that first set.

Abstract: A display uses column address circuitry having a plurality of multiplexing switching arrangements (50), each of which is associated with two buffers (46a;46b) for providing selected pixel drive signals. The two buffers provide respective pixel drive signals simultaneously to two adjacent columns, such that the pixel drive signal for one column starts before the end of the pixel drive signal for the column driven previously, and ends after the end of the pixel drive signal for the column driven previously. This enables a reduction in the number of buffers required and reduces the cross talk between column signals for adjacent columns within the group of columns shared by each multiplexing arrangement. This is achieved by ensuring that any capacitive coupling between first and second columns is charged to a static level before the signal on one of the columns is switched off.

Abstract: An electronic device (10) comprises an array of pixels (12), arranged in rows and columns (14,16) with row and column address lines (18,20) for addressing each pixel (12). Each row and column address line is connected to two discharge lines (30,32) through a discharge circuit (38). The circuit allows the passage of charge between the address line and the first discharge line (30) when the address line is at a potential below that of the first discharge line, and allows the passage of charge between the address line and the second discharge line (32) when the address line is at a potential above that of the second discharge line. This provides electrostatic discharge protection against an increase or decrease in voltage on the row or column address lines during manufacture of the device. By providing suitable voltages on the two discharge lines during operation of the manufactured device, it is possible to prevent the discharge circuit from operating, thereby saving power.

Abstract: A display device has row driver circuitry (30) providing row address signals and column address circuitry (32) providing pixel drive signals. The row address signals comprise a plurality of voltage levels (V1-V4) to implement a desired drive scheme. The column address circuitry comprises circuitry (70) for generating low voltage representations of at least some of the row address signals. The row address circuitry comprises a conversion circuit (72) for converting the representations into the row address signal levels, at least one of has a high voltage magnitude. The invention provides an architecture which partitions different sections of the row voltage supply circuitry optimally between the row and column drivers. This enables a simplified power supply to be provided which can be made more power efficient.

Abstract: An active matrix liquid crystal display device, comprising an array of liquid crystal display elements (12) having associated switching devices (11) and driven via sets of selection and data address conductors (14,16) by a peripheral control and driving circuit (25), is arranged to undergo a power down procedure when being turned off, in which the control and driving circuit, in response to a power down induction signal (PD) being received thereby, drives the display element electrodes (17) to a predetermined, low, voltage level such that the voltage across the LC material is below the threshold level. Thereafter, electrical power to the control and driving circuit is terminated. In this way, undesirable residual images which can otherwise be produced when turning the display device off are avoided.

Abstract: A liquid crystal display has a plurality of buffers 46 controlling a plurality of column lines. The buffers have a bias current control input 47 which is controlled, in the example by timing circuitry 50, to current during the row period for writing to each row of pixels. In particular, the row period may be divided between a drive period with a high buffer bias current and a voltage maintenance period with a lower buffer bias current.

Abstract: An active matrix display device comprises an array of picture elements, e.g. liquid crystal picture elements, first and second sets of address conductors (16, 18) extending in row and column directions respectively and connected with the picture elements, and a set of connection conductors (30) extending in the same direction as the second set of address conductors (18), each of which is connected to a respective one of the first set of conductors (16) at the location of a picture element, and via which address signals are supplied to that first set.

Abstract: A matrix display device (100) comprises an array of pixels (25) for producing a display output in response to voltages applied by drive circuit means (10,16,68). Each pixel (25) has a cell (18) comprising electro-optical material between two electrodes (5,6), the polarity of the voltage applied across the electrodes of each cell being periodically inverted. The device includes correction means (72) for modifying voltages generated by the drive circuit means (10,16,68) to compensate for display artefacts, such as flicker. The correction means comprises a measurement pixel (25a) and means for generating for each of the voltage polarities applied across the electrodes (18a) of the cells (18) a respective signal indicative of the capacitance of the measurement pixel cell, the correction means (72) modifying voltages generated by the drive circuit means (10,16,68) in response to said signals.

Abstract: A matrix display device (60) comprises an array of pixels for producing a display output in response to drive signal voltages using an inversion drive scheme. Display artefacts, especially flicker, are corrected for by connecting together, in parallel, two pixels (31), previously addressed with respective drive signal voltages of opposite polarity, and measuring a residual voltage caused by a difference in charge stored on the two pixels due to a DC offset present in the pixels. The measured voltage is used to modify subsequent drive signal voltages for the pixels in order to reduce the measured voltage, i.e. towards zero, thus reducing display artefacts caused by the DC offset in the pixels. The invention is particularly applicable to transmissive type liquid crystal display devices.

Abstract: An electronic device (10) comprises an array of pixels (12), arranged in rows and columns (14,16) with row and column address lines (18,20) for addressing each pixel (12). Each row and column address line is connected to two discharge lines (30,32) through a discharge circuit (38). The circuit allows the, passage of charge between the address line and the first discharge line (30) when the address line is at a potential below that of the first discharge line, and allows the passage of charge between the address line and the second discharge line (32) when the address line is at a potential above that of the second discharge line. This provides electrostatic discharge protection against an increase or decrease in voltage on the row or column address lines during manufacture of the device. By providing suitable voltages on the two discharge lines during operation of the manufactured device, it is possible to prevent the discharge circuit from operating, thereby saving power.

Abstract: An active matrix display device comprises an array of picture elements, e.g. liquid crystal picture elements, first and second sets of address conductors (16, 18) extending in row and column directions respectively and connected with the picture elements, and a set of connection conductor lines (30′) extending in the same direction as one set of address conductors (18), each of which is connected to a respective one of the other set of conductors (16), and via which address signals are supplied to that other set.

Abstract: A method of driving an active matrix liquid crystal display in a partial display mode is provided, together with a display operable in accordance therewith. A live portion (4) of the display is driven to display image data (6) and a dormant portion (8) is driven to display a substantially constant grey scale level output. The method comprises applying a signal (40) to each of the column address conductors (18) associated with the dormant portion (8) which comprises a combination of a signal substantially the same as the signal (14) applied to the counter electrode and kickback correction, such that the resultant kickback correction applied to each of the picture elements associated with the dormant portion (8) substantially corresponds to the grey scale level of the dormant portion. This serves to reduce the power consumption of the dormant portion (8), whilst avoiding the application of a substantial DC across the picture elements of the dormant portion (8).

Abstract: A display uses column address circuitry having a plurality of multiplexing switching arrangements (50), each of which is associated with two buffers (46a;46b) for providing selected pixel drive signals. The two buffers provide respective pixel drive signals simultaneously to two adjacent columns, such that the pixel drive signal for one column starts before the end of the pixel drive signal for the column driven previously, and ends after the end of the pixel drive signal for the column driven previously. This enables a reduction in the number of buffers required and reduces the cross talk between column signals for adjacent columns within the group of columns shared by each multiplexing arrangement. This is achieved by ensuring that any capacitive coupling between first and second columns is charged to a static level before the signal on one of the columns is switched off.

Abstract: A display has circuitry (50) which generates all possible pixel drive signal levels on separate signal level lines. A buffer (54) is associated with each signal level line. The outputs of the buffers are selectably switchable onto the columns. The signal levels for each column are stored in a memory (72) and the buffers are controlled in dependence on the stored signal levels. The response of the buffers is heavily dependent on the output load, and there is a very large variation in the output load of the buffers (54), as a function of the number of columns to which the buffer output is to be provided. The buffers are controlled in dependence on stored signal levels to ensure stability of the buffers for any output load.

Abstract: A display device has row driver circuitry (30) providing row address signals and column address circuitry (32) providing pixel drive signals. The row address signals comprise a plurality of voltage levels (V1- V4) to implement a desired drive scheme. The column address circuitry comprises circuitry (70) for generating low voltage representations of at least some of the row address signals. The row address circuitry comprises a conversion circuit (72) for converting the representations into the row address signal levels, at least one of has a high voltage magnitude. The invention provides an architecture which partitions different sections of the row voltage supply circuitry optimally between the row and column drivers. This enables a simplified power supply to be provided which can be made more power efficient.