Abstract: A method of fabricating an IC includes providing a substrate including a semiconductor surface having well diffusions for a plurality of devices including bipolar, complementary metal oxide semiconductor (CMOS), and double-diffused MOS (DMOS) devices. A polysilicon layer is deposited on a dielectric layer over the semiconductor surface, an anti-reflective coating (ARC) layer is formed on the polysilicon layer, and a photoresist pattern is formed on the ARC layer. The ARC layer is etched in areas exposed by the photoresist pattern to define areas including gate areas having the ARC layer on the polysilicon layer. The photoresist pattern is removed. Polysilicon etching is performed in areas lacking the ARC layer to form polysilicon gates having a remaining ARC portion of the ARC layer thereon. A self-aligned ion implant uses the remaining ARC portion as an additional implant blocking layer for the polysilicon gates, and the remaining ARC portion is stripped.

Abstract: A method of manufacturing an IC device includes providing a workpiece having least one dielectric layer disposed on a surface of the workpiece. The method also includes processing the dielectric layer to form a plurality of apertures in the dielectric layer, where the processing includes at least one micromask-prone process. The method further includes subsequent to the processing step, cryogenically treating the workpiece. In the method, the treating step removes particles deposited on or in the plurality of apertures during the processing step and maintains the plurality of apertures, where the particles are generated from micromask features resulting from the micromask-prone process.