Abstract: A method and system for the simultaneous placement of large and small cells in an electronic circuit. A coarse placement using well known methods may provide an initial placement of cells. Cells meeting a size criteria may be selected for further processing. An optimum cell orientation may be determined. An optimum axis of movement for separation may be determined. Overlapping cells may be separated and their positions may be optimized in both horizontal and vertical directions. Any cell moved from its initial placement may be fixed so as not to be moved during subsequent placements. This process may be repeated for cells meeting a new, generally smaller, size criteria. A well known detailed placement process may finalize a design. In this novel manner, large and small cells may be automatically simultaneously placed, deriving speed and quality advantages over prior art methods.

Abstract: A method and system of constrained optimization with linear constraints to remove overlap among cells of an integrated circuit. A coarse placement using well known methods may provide an initial placement of cells. Overlapping cells are separated. Any cell moved to its initial placement may be fixed so as not to be moved during subsequent placements. A plurality of linear inequalities representing allowable placements of a plurality of cells of a layout is generated. An objective function measuring cell movement subject to the constraints of the plurality of inequalities is minimized. The objective function minimizes cell movement from the initial cell placement. In this novel manner, large and small cells may be automatically simultaneously placed, deriving speed and quality advantages over prior art methods.

Abstract: A method and system of constrained optimization with linear constraints to remove overlap among cells of an integrated circuit. A coarse placement using well known methods may provide an initial placement of cells. Overlapping cells are separated. Any cell moved to its initial placement may be fixed so as not to be moved during subsequent placements. A plurality of linear inequalities representing allowable placements of a plurality of cells of a layout is generated. An objective function measuring cell movement subject to the constraints of the plurality of inequalities is minimized. The objective function minimizes cell movement from the initial cell placement. In this novel manner, large and small cells may be automatically simultaneously placed, deriving speed and quality advantages over prior art methods.

Abstract: A method and system for the simultaneous placement of large and small cells in an electronic circuit. A coarse placement using well known methods may provide an initial placement of cells. Cells meeting a size criteria may be selected for further processing. An optimum cell orientation may be determined. An optimum axis of movement for separation may be determined. Overlapping cells may be separated and their positions may be optimized in both horizontal and vertical directions. Any cell moved from its initial placement may be fixed so as not to be moved during subsequent placements. This process may be repeated for cells meeting a new, generally smaller, size criteria. A well known detailed placement process may finalize a design. In this novel manner, large and small cells may be automatically simultaneously placed, deriving speed and quality advantages over prior art methods.