Abstract: A memory mapped keyboard controller within a peripheral controller for use in an Industry Standard Architecture (ISA) computer provides a method and apparatus for efficiently monitoring and reading a keyboard switch matrix. In a first mode of operation, the controller activates all the columns and monitors all the rows in the switch matrix to detect when any one or more of the rows becomes active, indicating that at least one key on the keyboard has been pressed. When any row in the matrix is detected as active, then the keyboard controller enters a second mode wherein it selectively activates individual columns and monitors the rows in the switch matrix to detect which row and column contain the activated switch. When the switch location is determined, this location is interpreted by the keyboard controller into a scan code for the ISA computer.

Abstract: A method and apparatus for downloading instructions and other information to a peripheral controller for use in an Industry Standard Architecture (ISA) compatible computer provides a system which downloads instructions from the ISA compatible computer to an random access memory (RAM) accessible by the peripheral controller. The peripheral controller then executes these instructions to emulate the functions of conventional INTEL 8042 and 8742 series integrated circuits. The peripheral controller also provides other features not provided by the conventional 8042 or 8742 by executing other downloaded instructions located in the RAM.

Abstract: A current limiting circuit and technique is provided for preventing excessive current supplied to a circuit and for providing self-recovery characteristics thereto. The current limiting circuit includes an input for receiving a supply voltage for supplying power to the monitored circuit and an output for providing the power to the desired circuit being monitored. The circuit employs a drive transistor having a source connected to the input and a drain connected to the output. The drive transistor further includes a gate for receiving a control signal. A current mirror circuit is provided for sensing a current overload and adjusting the control signal to indicate the amount of current drawn. During normal current draw, the circuit provides the supply voltage as the output. When excessive current draw is detected, the drive transistor is turned off and the output current is thereby cut off. When the current decreases to normal current loads, the drive transistor is turned back on.

Abstract: A memory mapped keyboard controller within a peripheral controller for use in an Industry Standard Architecture (ISA) computer provides a method and apparatus for efficiently monitoring and reading a keyboard switch matrix. In a first mode of operation, the controller activates all the columns and monitors all the rows in the switch matrix to detect when any one or more of the rows becomes active, indicating that at least one key on the keyboard has been pressed. When any row in the matrix is detected as active, then the keyboard controller enters a second mode wherein it selectively activates individual columns and monitors the rows in the switch matrix to detect which row and column contain the activated switch. When the switch location is determined, this location is interpreted by the keyboard controller into a scan code for the ISA computer.

Abstract: A method and apparatus for downloading instructions and other information to a peripheral controller for use in an Industry Standard Architecture (ISA) compatible computer provides a system which downloads instructions from the ISA compatible computer to an random access memory (RAM) accessible by the peripheral controller. The peripheral controller then executes these instructions to emulate the functions of conventional INTEL 8042 and 8742 series integrated circuits. The peripheral controller also provides other features not provided by the conventional 8042 or 8742 by executing other downloaded instructions located in the RAM.

Abstract: An interrupt driven peripheral controller for use in an Industry Standard Architecture (ISA) compatible computer provides a system to minimize power consumption as compared to conventional peripheral controllers. The peripheral controller utilizes an internal interrupt controller which responds to inputs from an ISA compatible microprocessor host, a keyboard, a mouse, and other devices connected to the I/O ports of the ISA compatible computer. The interrupt controller provides an interrupt register for the peripheral controller and generates an interrupt any time one or more of the devices controlled by the peripheral controller is activated. The peripheral controller enters a low power consumption mode if no interrupts are detected for a predetermined period of time. When the interrupt controller generates an interrupt, the peripheral controller is activated from it low power mode and services the device or devices which have caused the interrupt.