Abstract: A system for restoring muscle function to the lumbar spine to treat low back pain is provided. The system may include electrodes coupled to an implantable pulse generator (IPG), a handheld activator configured to transfer a stimulation command to the IPG, and an external programmer configured to transfer programming data to the IPG. The stimulation command directs the programmable controller to stimulate the tissue in accordance with the programming data. The system may include a software-based programming system run on a computer such that the treating physician may program and adjust stimulation parameters.

Abstract: An article of manufacture includes a non-transitory machine-readable medium. The medium includes instructions that cause a processor to execute a shift instruction. The shift instruction is to cause a source data in memory to be shifted left or shifted right. The shift instruction is to include a source parameter and a bit size parameter. The processor is to execute the shift instruction through a shift of a first source word of the source data by the bit size parameter to yield a first intermediate word, a shift of a second source word of the source data by the bit size parameter to yield a second intermediate word and a first set of shifted-out bits, and through execution of a logical OR operation on the first intermediate word and the first set of shifted-out bits to yield a first result word.

Abstract: An article of manufacture includes a non-transitory machine-readable medium. The medium includes instructions that cause a processor to execute a shift instruction. The shift instruction is to cause a source data in memory to be shifted left or shifted right. The shift instruction is to include a source parameter and a bit size parameter. The processor is to execute the shift instruction through a shift of a first source word of the source data by the bit size parameter to yield a first intermediate word, a shift of a second source word of the source data by the bit size parameter to yield a second intermediate word and a first set of shifted-out bits, and through execution of a logical OR operation on the first intermediate word and the first set of shifted-out bits to yield a first result word.

Abstract: Compact timestamps and related methods, systems and devices are described. An encoder is configured to generate compact timestamps of the disclosure by sampling states of linear feedback shift registers (LFSRs). A decoder may be configured to determine timing information responsive to the compact timestamps.

Abstract: An integrated circuit has a master processing core with a central processing unit coupled with a non-volatile memory and a slave processing core operating independently from the master processing core and having a central processing unit coupled with volatile program memory, wherein the master central processing unit is configured to transfer program instructions into the non-volatile memory of the slave processing core and wherein a transfer of the program instructions is performed by executing a dedicated instruction within the central processing unit of the master processing core.

Abstract: An integrated circuit has a master processing core with a central processing unit coupled with a non-volatile memory and a slave processing core operating independently from the master processing core and having a central processing unit coupled with volatile program memory, wherein the master central processing unit is configured to transfer program instructions into the non-volatile memory of the slave processing core and wherein a transfer of the program instructions is performed by executing a dedicated instruction within the central processing unit of the master processing core.

Abstract: An oscillator includes a tunable oscillator, a phase detector circuit communicatively coupled with an output of the tunable oscillator and an input to the oscillator, and an oscillator controller circuit configured to adjust frequency of the tunable oscillator based upon phase detection between output of the tunable oscillator and output of an external resonant element received at the input to the oscillator.

Abstract: An oscillator includes a tunable oscillator, a phase detector circuit communicatively coupled with an output of the tunable oscillator and an input to the oscillator, and an oscillator controller circuit configured to adjust frequency of the tunable oscillator based upon phase detection between output of the tunable oscillator and output of an external resonant element received at the input to the oscillator.

Abstract: An oscillator includes a tunable oscillator, a phase detector circuit communicatively coupled with an output of the tunable oscillator and an input to the oscillator, and an oscillator controller circuit configured to adjust frequency of the tunable oscillator based upon phase detection between output of the tunable oscillator and output of an external resonant element received at the input to the oscillator.

Abstract: Compact timestamps and related methods, systems and devices are described. An encoder is configured to generate compact timestamps of the disclosure by sampling states of linear feedback shift registers (LFSRs). A decoder may be configured to determine timing information responsive to the compact timestamps.

Abstract: An integrated circuit has a master processing core with a central processing unit coupled with a non-volatile memory and a slave processing core operating independently from the master processing core and having a central processing unit coupled with volatile program memory, wherein the master central processing unit is configured to transfer program instructions into the non-volatile memory of the slave processing core and wherein a transfer of the program instructions is performed by executing a dedicated instruction within the central processing unit of the master processing core.

Abstract: An oscillator includes a tunable oscillator, a phase detector circuit communicatively coupled with an output of the tunable oscillator and an input to the oscillator, and an oscillator controller circuit configured to adjust frequency of the tunable oscillator based upon phase detection between output of the tunable oscillator and output of an external resonant element received at the input to the oscillator.

Abstract: An integrated circuit has a master processing core with a central processing unit coupled with a non-volatile memory and a slave processing core operating independently from the master processing core and having a central processing unit coupled with volatile program memory, wherein the master central processing unit is configured to transfer program instructions into the non-volatile memory of the slave processing core and wherein a transfer of the program instructions is performed by executing a dedicated instruction within the central processing unit of the master processing core.

Abstract: Methods and apparatus for concentration determination using polarized light. The apparatus includes a first polarized light source having a first light source polarization axis and a second polarized light source having a second light source polarization axis generally perpendicular to the first light source polarization axis. Also, a first polarized light receiver having a first polarized light receiver polarization axis and configured to measure an intensity of light transmitted from the first light receiver polarizer and a second polarized light receiver having a second polarized light receiver polarization axis substantially perpendicular to the first light receiver polarization axis and configured to measure an intensity of light transmitted from the second light receiver polarizer, wherein the first and second light receiver polarization axes are generally +/?45 degrees relative to the first and second light source polarization axes.

Abstract: An audio alarm for a transporter having an electric motor. The alarm has a signal generator for generating a signal within the audible frequency range and a modulator for modulating a current that is applied to the electric motor in accordance with the signal generated by the signal generator.

Abstract: An electric device includes a motor and a motor drive for commanding a torque generated by the motor. A fault control circuit detects a fault condition associated with the motor drive. Upon detection of the fault condition, the fault control circuit adjusts the torque commanded by the motor drive.

Abstract: A method for detecting an open winding in a motor. The method employs passive monitoring of the voltage, current and speed of the motor. A residue voltage is calculated that equals the difference between an idealized set of voltage drops across the motor load elements and the actual voltage drops. When the magnitude of the residue voltage equals or exceeds a threshold, an open winding condition may be declared and appropriate action may be taken.