Abstract: A hot spot methodology incorporates wafer physical measurement with digital simulation for identifying and monitoring critical hot spots. Wafer physical data are collected from the processed wafer of the semiconductor device on a plurality of target locations. Hot spot candidates and corresponding simulation data are generated by digital simulation based on models and verifications of optical proximity and lithographic process correction according to the design data of a semiconductor device. Data analytics provides data correlation between the collected wafer physical data and the simulation data. Data analytics further performs data correction on the simulation data according to the wafer physical data that have best correlation with the simulation data to better predict critical hot spots.

Abstract: A system for auto defect screening using adaptive machine learning includes an adaptive model controller, a defect/nuisance library and a module for executing data modeling analytics. The adaptive model controller has a feed-forward path for receiving a plurality of defect candidates in wafer inspection, and a feedback path for receiving defects of interest already screened by one or more existing defect screening models after wafer inspection. The adaptive model controller selects data samples from the received data, interfaces with scanning electron microscope (SEM) review/inspection to acquire corresponding SEM results that validate if each data sample is a real defect or nuisance, and compiles model training and validation data. The module of executing data modeling analytics is adaptively controlled by the adaptive model controller to generate and validate one or more updated defect screening models using the model training and validation data according to a target specification.

Abstract: A system for auto defect screening using adaptive machine learning includes an adaptive model controller, a defect/nuisance library and a module for executing data modeling analytics. The adaptive model controller has a feed-forward path for receiving a plurality of defect candidates in wafer inspection, and a feedback path for receiving defects of interest already screened by one or more existing defect screening models after wafer inspection. The adaptive model controller selects data samples from the received data, interfaces with scanning electron microscope (SEM) review/inspection to acquire corresponding SEM results that validate if each data sample is a real defect or nuisance, and compiles model training and validation data. The module of executing data modeling analytics is adaptively controlled by the adaptive model controller to generate and validate one or more updated defect screening models using the model training and validation data according to a target specification.

Abstract: A hot spot methodology incorporates wafer physical measurement with digital simulation for identifying and monitoring critical hot spots. Wafer physical data are collected from the processed wafer of the semiconductor device on a plurality of target locations. Hot spot candidates and corresponding simulation data are generated by digital simulation based on models and verifications of optical proximity and lithographic process correction according to the design data of a semiconductor device. Data analytics provides data correlation between the collected wafer physical data and the simulation data. Data analytics further performs data correction on the simulation data according to the wafer physical data that have best correlation with the simulation data to better predict critical hot spots.

Abstract: A system for auto defect screening using adaptive machine learning includes an adaptive model controller, a defect/nuisance library and a module for executing data modeling analytics. The adaptive model controller has a feed-forward path for receiving a plurality of defect candidates in wafer inspection, and a feedback path for receiving defects of interest already screened by one or more existing defect screening models after wafer inspection. The adaptive model controller selects data samples from the received data, interfaces with scanning electron microscope (SEM) review/inspection to acquire corresponding SEM results that validate if each data sample is a real defect or nuisance, and compiles model training and validation data. The module of executing data modeling analytics is adaptively controlled by the adaptive model controller to generate and validate one or more updated defect screening models using the model training and validation data according to a target specification.

Abstract: A system for auto defect screening using adaptive machine learning includes an adaptive model controller, a defect/nuisance library and a module for executing data modeling analytics. The adaptive model controller has a feed-forward path for receiving a plurality of defect candidates in wafer inspection, and a feedback path for receiving defects of interest already screened by one or more existing defect screening models after wafer inspection. The adaptive model controller selects data samples from the received data, interfaces with scanning electron microscope (SEM) review/inspection to acquire corresponding SEM results that validate if each data sample is a real defect or nuisance, and compiles model training and validation data. The module of executing data modeling analytics is adaptively controlled by the adaptive model controller to generate and validate one or more updated defect screening models using the model training and validation data according to a target specification.

Abstract: A system includes a critical signature library for storing critical signature databases of chip design layouts in semiconductor manufacturing and a statistical model creator for creating statistical models based on the known problematic circuit patterns stored in the critical signature databases and a target specification based on deviation between physical measurement and simulation data or design data associated with the known problematic circuit patterns. The system further has a statistical model based predictor for predicting and discovering unknown problematic circuit patterns by applying the statistical models to a large number of candidate circuit patterns generated from a random layout generator, or extracted from the chip design layout based on hot spot sites determined by extended lithographic process check on the chip design layout or inspecting wafers manufactured with the chip design layout with an aggressive sensitivity setting.

Abstract: A system includes a critical signature library for storing critical signature databases of chip design layouts in semiconductor manufacturing and a statistical model creator for creating statistical models based on the known problematic circuit patterns stored in the critical signature databases and a target specification based on deviation between physical measurement and simulation data or design data associated with the known problematic circuit patterns. The system further has a statistical model based predictor for predicting and discovering unknown problematic circuit patterns by applying the statistical models to a large number of candidate circuit patterns generated from a random layout generator, or extracted from the chip design layout based on hot spot sites determined by extended lithographic process check on the chip design layout or inspecting wafers manufactured with the chip design layout with an aggressive sensitivity setting.

Abstract: A hot spot methodology incorporates wafer physical measurement with digital simulation for identifying and monitoring critical hot spots. Wafer physical data are collected from the processed wafer of the semiconductor device on a plurality of target locations. Hot spot candidates and corresponding simulation data are generated by digital simulation based on models and verifications of optical proximity and lithographic process correction according to the design data of a semiconductor device. Data analytics provides data correlation between the collected wafer physical data and the simulation data. Data analytics further performs data correction on the simulation data according to the wafer physical data that have best correlation with the simulation data to better predict critical hot spots.

Abstract: A number of wafers of a same semiconductor device are inspected to generate a plurality of candidate defect lists for identifying systematic defects. Each candidate defect list comprises a plurality of candidate defects obtained from inspecting one of the wafers. Each candidate defect is represented by a plurality of defect attributes including a defect location. The candidate defects in every one or more candidate defect lists are processed as a set by stage one grouping and filtering to generate a stage one defect list for each set. The candidate defects in all the stage one defect lists are then processed together by stage two grouping and filtering to generate a final defect lists for systematic defects. The defect attributes of each defect and a design pattern clip extracted from a design database based on the defect location are used in the hierarchical grouping and filtering.

Abstract: A number of wafers of a semiconductor device are inspected to generate a plurality of wafer inspection data. A method for identifying critical hot spots to improve lithographic process of manufacturing the semiconductor device uses design signature analytics according to the plurality of wafer inspection data with reference to the design data of the semiconductor device. Design signature analytics includes global alignment, full chip pattern correlation, pattern characterization and design signature inference. The global alignment compensates for the physical coordinate offsets between the chip design data and the wafer inspection data. The full chip pattern correlation uses multi-stage pattern matching and grouping to identify highly repeating defects as hot spots. Pattern characterization extracts the design patterns and design signatures of the highly repeating defects.

Abstract: A number of wafers of a same semiconductor device are inspected to generate a plurality of candidate defect lists for identifying systematic defects. Each candidate defect list comprises a plurality of candidate defects obtained from inspecting one of the wafers. Each candidate defect is represented by a plurality of defect attributes including a defect location. The candidate defects in every one or more candidate defect lists are processed as a set by stage one grouping and filtering to generate a stage one defect list for each set. The candidate defects in all the stage one defect lists are then processed together by stage two grouping and filtering to generate a final defect lists for systematic defects. The defect attributes of each defect and a design pattern clip extracted from a design database based on the defect location are used in the hierarchical grouping and filtering.

Abstract: A design-based manufacturing optimization (DMO) server comprises a distributed computing system and a DMO software module incorporating with a design scanner to scan and analyze design data of a semiconductor device for optimizing manufacturing of the semiconductor device. The DMO software module sets up a pattern signature database and a manufacturing optimization database, generates design-based manufacturing recipes, interfaces with manufacturing equipment through a manufacturing interface module, and interfaces with electronic design automation suppliers for the design data through a design interface module. The DMO server executes the design-based manufacturing recipes for manufacturing optimization.

Abstract: An on-site display apparatus shows calendar events of a conference room on site for conference attendees to identify and locate the correct conference room. The on-site display apparatus including a calendar event processing unit, a calendar event storage unit, a display controller and a calendar event display device is installed in an area proximate to the conference room. The calendar event information is set up in the calendar event processing unit using a local input device, or using a networking device by a remote computer on a network. The calendar event processing unit can also retrieve calendar event information stored in a remote centralized calendar event management system through the network. Event information of a single or multiple conference sessions associated with the conference room can be displayed alternatively every few seconds so as to be more informative to the conference attendees.