Abstract: A voltage regulator with an amplifier for comparing a feedback voltage and a reference voltage. The output of the amplifier is adjusted based on the comparison to provide a regulated voltage at the regulator output. The regulator includes a current comparator that compares a current indicative of a current of the amplifier with a reference current to provide a signal used to enable a boost current circuit to provide boost current for the amplifier during a boost current event. The regulator includes current comparator control circuitry for providing improved performance of the current comparator in enabling and disabling the boost current to the amplifier.

Abstract: A linear voltage regulator includes a converter circuit that provides a serial bitstream having a pulse density that is indicative of a difference between a regulated voltage of the linear voltage regulator and a reference voltage. The linear voltage regulator also includes a digital to analog converter circuit that includes an input to receive the serial bitstream. The digital to analog converter circuit includes an averager circuit that produces an output signal to control a voltage of a control terminal of a power transistor of the linear voltage regulator for regulating the regulated voltage based on the pulse density of the serial bitstream.

Abstract: A switch including multiple current branches and slope circuitry. The slope circuitry activates or deactivates the current branches one at a time according to a corresponding one of multiple slope functions in response to a transition of the input signal. Each current branch develops a current so that the output node follows a predetermined voltage-current function. Each slope function is other than a step function and may be linear or non-linear. A slope function may be configured as a current-starved inverter charging or discharging a capacitor with a fixed current. Delay circuitry may be included to delay the inputs or the outputs of the slope circuitry configured as multiple slope control circuits. The slope control circuits may be daisy-chained from first to last to effectuate the delay. Each current branch may include an electronic switch and may further include a resistor to determine the current level.

Abstract: A current sense circuit is provided. The current sense circuit includes an input terminal coupled to sense an input current. A first terminal of a diode is coupled as the input terminal. A current limiter has a first terminal coupled to a second terminal of the diode. A current source is coupled to a second terminal of the current limiter and configured to generate a first current. A current mirror includes a first leg coupled to the current limiter and the current source and a second leg coupled for providing an output current.

Abstract: A current sense circuit is provided. The current sense circuit includes an input terminal coupled to sense an input current. A first terminal of a diode is coupled as the input terminal. A current limiter has a first terminal coupled to a second terminal of the diode. A current source is coupled to a second terminal of the current limiter and configured to generate a first current. A current mirror includes a first leg coupled to the current limiter and the current source and a second leg coupled for providing an output current.

Abstract: A staged current mirror is disclosed. The staged current mirror includes a plurality of first type current mirrors. Each of the plurality of first type current mirrors includes a plurality of transistors of a first type. The staged current mirror also includes at least one second type current mirror coupled to two of the plurality of the first type current mirrors. The second type of current mirror including a plurality of transistor of a second type that is different from the first type.

Abstract: The present application relates to a hysteresis comparator, which comprises a hysteresis comparator circuit and a hysteresis generating circuit. The hysteresis comparator circuit two comparator legs each with a differential transistor and a load transistor. The differential transistors receive a comparator biasing current, which is variably divided based on the relative levels of the voltage signals applied to control terminals of the differential transistors. An output stage is provided for developing an output voltage signal based on currents flowing through the load transistors. The hysteresis generating circuit is arranged for selectively injecting a hysteresis current in or selectively drawing a hysteresis current from either one of the two comparator legs depending on the level of the output voltage signal.

Abstract: The present application relates to a hysteresis comparator, which comprises a hysteresis comparator circuit and a hysteresis generating circuit. The hysteresis comparator circuit two comparator legs each with a differential transistor and a load transistor. The differential transistors receive a comparator biasing current, which is variably divided based on the relative levels of the voltage signals applied to control terminals of the differential transistors. An output stage is provided for developing an output voltage signal based on currents flowing through the load transistors. The hysteresis generating circuit is arranged for selectively injecting a hysteresis current in or selectively drawing a hysteresis current from either one of the two comparator legs depending on the level of the output voltage signal.

Abstract: An overvoltage protection circuit is disclosed. The overvoltage protection circuit includes an input voltage port, an output voltage port, a low pass filter coupled to the input voltage port and a voltage regulator coupled to the low pass filter. The overvoltage protection circuit also includes a transistor having a gate, a drain and a source. The transistor is coupled to the input voltage port and the output voltage port and the gate is coupled to the voltage regulator.

Abstract: An overvoltage protection circuit is disclosed. The overvoltage protection circuit includes an input voltage port, an output voltage port, a low pass filter coupled to the input voltage port and a voltage regulator coupled to the low pass filter. The overvoltage protection circuit also includes a transistor having a gate, a drain and a source. The transistor is coupled to the input voltage port and the output voltage port and the gate is coupled to the voltage regulator.