Patents by Inventor Jaung-Ke Yeh

Jaung-Ke Yeh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Method to make self-aligned source etching available in split-gate flash
    Patent number: 5950087
    Abstract: A method is provided for forming a common self-aligned source line in order to reduce the number of surface contacts and at the same time alleviate the field oxide encroachment into the cell area. Thus, the size of the split-gate flash memory is substantially reduced on both accounts. This is accomplished by forming a buffer polysilicon layer over the floating gate to serve as an etch stop to protect the first poly-oxide of the floating gate during the self-aligned source etching.
    Type: Grant
    Filed: September 10, 1998
    Date of Patent: September 7, 1999
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chia-Ta Hsieh, Yai-Fen Lin, Hung-Cheng Sung, Jaung-Ke Yeh, Kuo-Reay Peng, Di-Son Kuo