Patents by Inventor Javed Shaikh

Javed Shaikh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230337406
    Abstract: An electronic device comprises a heat source and a heat distribution structure coupled to the heat source to distribute heat generated by the heat source during operation of the electronic device.
    Type: Application
    Filed: December 23, 2020
    Publication date: October 19, 2023
    Inventors: Ritu BAWA, Ruander CARDENAS, Kathiravan D, Jia Yan GO, Chin Kung GOH, Jeff KU, Prakash Kurma RAJU, Baomin LIU, Twan Sing LOO, Mikko MAKINEN, Columbia MISHRA, Juha PAAVOLA, Prasanna PICHUMANI, Daniel RAGLAND, Kannan RAJA, Khai Ern SEE, Javed SHAIKH, Gokul SUBRAMANIAM, George Baoci SUN, Xiyong TIAN, Hua YANG, Mark CARBONE, Vivek PARANJAPE, Nehakausar PINJARI, Hari Shanker THAKUR, Christopher MOORE, Gustavo FRICKE, Justin HUTTULA, Gavin SUNG, Sammi WY LIU, Arnab SEN, Chun-Ting LIU, Jason Y. JIANG, Gerry JUAN, Shih Wei NIEN, Lance LIN, Evan KUKLINSKI
  • Publication number: 20230209775
    Abstract: Wire coils are distributed over the bottom surface of an inner chamber of a vapor chamber. The working fluid of the vapor chamber comprises ferromagnetic particles that are attracted to a wire coil as current passes through the wire coil. The resulting increase in the volumetric concentration of ferromagnetic particles in the vicinity of the activated wire coil increases the capacity of the working fluid to remove heat from an integrated circuit component attached to the vapor chamber in the region of the activated wire coil. The vapor chamber wire coils can be activated based on performance metrics associated with the processor units of an integrated circuit component, thereby allowing for the thermal resistance of the working fluid to be dynamically adjusted based on the workload executing on the integrated circuit component and power consumption transients.
    Type: Application
    Filed: December 24, 2021
    Publication date: June 29, 2023
    Applicant: Intel Corporation
    Inventors: Javed Shaikh, Kathiravan Dhandapani, Greeshmaja Govind, Asif S. Khan, Bijendra Singh, Yagnesh V. Waghela
  • Patent number: 11676883
    Abstract: An Integrated Circuit (IC) assembly, comprising an IC package coupled to a substrate, and a subassembly comprising a thermal interface layer. The thermal interface layer comprises a phase change material (PCM) over the IC package. At least one thermoelectric cooling (TEC) apparatus is thermally coupled to the thermal interface layer.
    Type: Grant
    Filed: March 15, 2019
    Date of Patent: June 13, 2023
    Assignee: Intel Corporation
    Inventors: Javed Shaikh, Je-Young Chang, Kelly Lofgreen, Weihua Tang, Aastha Uppal
  • Publication number: 20220300048
    Abstract: Thermal Management Systems for electronic devices and related methods are disclosed. An example electronic housing includes a housing defining a cavity, electronics in the cavity, and a touch display over the electronics. A heat spreader has a first surface toward the electronics and a second surface opposite the first surface toward the touch display, where the heat spreader is to dissipate heat generated by the electronics. A glass cover is coupled to the housing and has a first side toward the touch display and a second side opposite the first side, where the glass cover is exposed external to the housing. An insulation layer is between the second surface of the heat spreader and the second side of the glass cover to restrict heat transfer from the electronics to the second side of the glass cover.
    Type: Application
    Filed: April 1, 2022
    Publication date: September 22, 2022
    Inventors: Min Suet Lim, Jeff Ku, Fern Nee Tan, John Lang, Kavitha Nagarajan, Javed Shaikh, Deepak Sekar
  • Publication number: 20220104399
    Abstract: In one embodiment, a system includes a chip package and a cooling apparatus coupled to the chip package. The chip package includes one or more processors, and the cooling apparatus includes a first cavity defined at least partially by a first metal wall and a second metal wall and a second cavity defined at least partially by a flat third metal wall and the second metal wall. An internal pressure of the first cavity is lower than an ambient pressure outside the sealed first cavity. The second cavity includes a liquid disposed therein and wick material coupled to an interior surface of the third wall, and the chip package is positioned such that it coupled to the flat third metal wall of the cooling apparatus.
    Type: Application
    Filed: December 2, 2021
    Publication date: March 31, 2022
    Applicant: Intel Corporation
    Inventors: Javed Shaikh, Prakash Kurma Raju, Kathiravan Dhandapani
  • Publication number: 20210022266
    Abstract: In one embodiment, a system includes a chip package and a cooling apparatus coupled to the chip package. The chip package includes one or more processors, and the cooling apparatus includes a first cavity defined at least partially by a first metal wall and a second metal wall and a second cavity defined at least partially by a flat third metal wall and the second metal wall. An internal pressure of the first cavity is lower than an ambient pressure outside the sealed first cavity. The second cavity includes a liquid disposed therein and wick material coupled to an interior surface of the third wall, and the chip package is positioned such that it coupled to the flat third metal wall of the cooling apparatus.
    Type: Application
    Filed: September 25, 2020
    Publication date: January 21, 2021
    Applicant: Intel Corporation
    Inventors: Javed Shaikh, Prakash Kurma Raju, Kathiravan Dhandapani
  • Publication number: 20200294884
    Abstract: An Integrated Circuit (IC) assembly, comprising an IC package coupled to a substrate, and a subassembly comprising a thermal interface layer. The thermal interface layer comprises a phase change material (PCM) over the IC package. At least one thermoelectric cooling (TEC) apparatus is thermally coupled to the thermal interface layer.
    Type: Application
    Filed: March 15, 2019
    Publication date: September 17, 2020
    Applicant: Intel Corporation
    Inventors: Javed Shaikh, Je-Young Chang, Kelly Lofgreen, Weihua Tang, Aastha Uppal
  • Publication number: 20200219789
    Abstract: An integrated circuit structure may be formed using a phase change material to substantially fill at least one chamber within the integrated circuit assembly to increase thermal capacitance. The integrated circuit assembly may comprise a substrate, at least one integrated circuit device electrically attached to the substrate, a heat dissipation device, a thermal interface material between the integrated circuit device and the heat dissipation device, a chamber defined by the heat dissipation device, the substrate, and the integrated circuit device, and a phase change material within the chamber.
    Type: Application
    Filed: January 7, 2019
    Publication date: July 9, 2020
    Applicant: Intel Corporation
    Inventors: Aastha Uppal, Je-Young Chang, Javed Shaikh, Divya Mani, Weihua Tang