Abstract: A fully differential analogue circuit is tested by monitoring the currents in two branches when a common mode signal is applied and indicating correct operation if the two currents are correlated. A part of the circuit (T20,T21,S1,S2,S3,S4) is modified during test and currents through transistors (T20,T21) are monitored by means of a current mirror and current subtractor arrangement (T213,T214,T215,T216). A voltage (VRL) is produced that, with correlation of the currents, will be approximately mid way between the power supply rails and when mis-correlation occurs will tend to one of the supply rails. The voltage (VRL) is applied to a first amplifier (T219,T221) and to a second amplifier (T222,T223) having a different threshold value from the first amplifier. The outputs of the amplifiers will have opposite logic values if the voltage (VRL) lies between their threshold voltages and the EXOR gate 9 will give a logic 1 output indicating proper circuit function.