Patents by Inventor Javier Sebastian Turek
Javier Sebastian Turek has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 11577388Abstract: Apparatus, systems, methods, and articles of manufacture for automatic robot perception programming by imitation learning are disclosed. An example apparatus includes a percept mapper to identify a first percept and a second percept from data gathered from a demonstration of a task and an entropy encoder to calculate a first saliency of the first percept and a second saliency of the second percept. The example apparatus also includes a trajectory mapper to map a trajectory based on the first percept and the second percept, the first percept skewed based on the first saliency, the second percept skewed based on the second saliency. In addition, the example apparatus includes a probabilistic encoder to determine a plurality of variations of the trajectory and create a collection of trajectories including the trajectory and the variations of the trajectory.Type: GrantFiled: June 27, 2019Date of Patent: February 14, 2023Assignee: Intel CorporationInventors: David I. Gonzalez Aguirre, Javier Felip Leon, Javier Sebastián Turek, Luis Carlos Maria Remis, Ignacio Javier Alvarez, Justin Gottschlich
-
Publication number: 20230031591Abstract: Methods and apparatus to facilitate generation of database queries are disclosed. An example apparatus includes a generator to generate a global importance tensor. The global importance tensor based on a knowledge graph representative of information stored in a database. The knowledge graph includes objects and connections between the objects. The global importance tensor includes importance values for different types of the connections between the objects. The example apparatus further includes an importance adaptation analyzer to generate a session importance tensor based on the global importance tensor and a user query, and a user interface to provide a suggested query to a user based on the session importance tensor.Type: ApplicationFiled: June 29, 2022Publication date: February 2, 2023Inventors: Luis Carlos Maria Remis, Ignacio Javier Alvarez, Li Chen, Javier Felip Leon, David Israel Gonzalez Aguirre, Justin Gottschlich, Javier Sebastian Turek
-
Patent number: 11507773Abstract: Systems, apparatuses and methods may store a plurality of classes that represent a plurality of clusters in a cache. Each of the classes represents a group of the plurality of clusters and the plurality of clusters is in a first data format. The systems, apparatuses and methods further modify input data from a second data format to the first data format and conduct a similarity search based on the input data in the first data format to assign the input data to at least one class of the classes.Type: GrantFiled: June 27, 2020Date of Patent: November 22, 2022Assignee: Intel CorporationInventors: Mariano Tepper, Dipanjan Sengupta, Theodore Willke, Javier Sebastian Turek
-
Publication number: 20220357951Abstract: An example system includes memory; a central processing unit (CPU) to execute first operations; in-memory execution circuitry in the memory; and detector software to cause offloading of second operations to the in-memory execution circuitry, the in-memory execution circuitry to execute the second operations in parallel with the CPU executing the first operations.Type: ApplicationFiled: July 25, 2022Publication date: November 10, 2022Inventors: Vy Vo, Dipanjan Sengupta, Mariano Tepper, Javier Sebastian Turek
-
Publication number: 20220318088Abstract: Systems, apparatuses and methods may provide for technology that identifies a sequence of events associated with a computer architecture, categorizes, with a natural language processing system, the sequence of events into a sequence of words, identifying an anomaly based on the sequence of words and triggering an automatic remediation process in response to an identification of the anomaly.Type: ApplicationFiled: June 21, 2022Publication date: October 6, 2022Inventors: Javier Sebastian Turek, Vy Vo, Javier Perez-Ramirez, Marcos Carranza, Mateo Guzman, Cesar Martinez-Spessot, Dario Oliver
-
Patent number: 11409594Abstract: Systems, apparatuses and methods may provide for technology that identifies a sequence of events associated with a computer architecture, categorizes, with a natural language processing system, the sequence of events into a sequence of words, identifying an anomaly based on the sequence of words and triggering an automatic remediation process in response to an identification of the anomaly.Type: GrantFiled: June 27, 2020Date of Patent: August 9, 2022Assignee: Intel CorporationInventors: Javier Sebastian Turek, Vy Vo, Javier Perez-Ramirez, Marcos Carranza, Mateo Guzman, Cesar Martinez-Spessot, Dario Oliver
-
Patent number: 11403102Abstract: Systems, apparatuses and methods may provide for technology that recognizes, via a neural network, a pattern of memory access and compute instructions based on an input set of machine instructions, determines, via a neural network, a sequence of instructions to be offloaded for execution by the secondary computing device based on the recognized pattern of memory access and compute instructions, and translates the sequence of instructions to be offloaded from instructions executable by a central processing unit (CPU) into instructions executable by the secondary computing device.Type: GrantFiled: June 27, 2020Date of Patent: August 2, 2022Assignee: Intel CorporationInventors: Vy Vo, Dipanjan Sengupta, Mariano Tepper, Javier Sebastian Turek
-
Patent number: 11386256Abstract: Systems and methods for determining a configuration for a microarchitecture are described herein. An example system includes a proposal generator to generate a first candidate configuration of parameters for the microarchitecture, a machine learning model to process the first candidate configuration of parameters to output estimated performance indicators for the microarchitecture, an uncertainty checker to determine whether the estimated performance indicators are reliable, and a performance checker. In response to a determination that the estimated performance indicators are reliable, the performance checker is to determine whether the estimated performance indicators have improved toward a target. Further, if the estimated performance indicators have improved, the performance checker is to store the first candidate configuration of parameters in a memory as a potential solution for a microarchitecture without performing a full simulation on the first candidate configuration of parameters.Type: GrantFiled: November 30, 2020Date of Patent: July 12, 2022Assignee: Intel CorporationInventors: Javier Sebastián Turek, Javier Felip Leon, Alexander Heinecke, Evangelos Georganas, Luis Carlos Maria Remis, Ignacio Javier Alvarez, David Israel Gonzalez Aguirre, Shengtian Zhou, Justin Gottschlich
-
Patent number: 11386157Abstract: Methods and apparatus to facilitate generation of database queries are disclosed. An example apparatus includes a generator to generate a global importance tensor. The global importance tensor based on a knowledge graph representative of information stored in a database. The knowledge graph includes objects and connections between the objects. The global importance tensor includes importance values for different types of the connections between the objects. The example apparatus further includes an importance adaptation analyzer to generate a session importance tensor based on the global importance tensor and a user query, and a user interface to provide a suggested query to a user based on the session importance tensor.Type: GrantFiled: June 28, 2019Date of Patent: July 12, 2022Assignee: Intel CorporationInventors: Luis Carlos Maria Remis, Ignacio Javier Alvarez, Li Chen, Javier Felip Leon, David Israel Gonzalez Aguirre, Justin Gottschlich, Javier Sebastian Turek
-
Publication number: 20220193895Abstract: Methods, apparatus, systems and articles of manufacture are disclosed for object manipulation via action sequence optimization. An example method disclosed herein includes determining an initial state of a scene, generating a first action phase sequence to transform the initial state of the scene to a solution state of the scene by selecting a plurality of action phases based on action phase probabilities, determining whether a first simulated outcome of executing the first action phase sequence satisfies an acceptability criterion and, when the first simulated outcome does not satisfy the acceptability criterion, calculating a first cost function output based on a difference between the first simulated outcome and the solution state of the scene, the first cost function output utilized to generate updated action phase probabilities.Type: ApplicationFiled: December 31, 2021Publication date: June 23, 2022Inventors: Javier Felip Leon, David Israel Gonzalez Aguirre, Javier Sebastián Turek, Ignacio Javier Alvarez, Luis Carlos Maria Remis, Justin Gottschlich
-
Patent number: 11213947Abstract: Methods, apparatus, systems and articles of manufacture are disclosed for object manipulation via action sequence optimization. An example method disclosed herein includes determining an initial state of a scene, generating a first action phase sequence to transform the initial state of the scene to a solution state of the scene by selecting a plurality of action phases based on action phase probabilities, determining whether a first simulated outcome of executing the first action phase sequence satisfies an acceptability criterion and, when the first simulated outcome does not satisfy the acceptability criterion, calculating a first cost function output based on a difference between the first simulated outcome and the solution state of the scene, the first cost function output utilized to generate updated action phase probabilities.Type: GrantFiled: June 27, 2019Date of Patent: January 4, 2022Assignee: INTEL CORPORATIONInventors: Javier Felip Leon, David Israel Gonzalez Aguirre, Javier Sebastián Turek, Ignacio Javier Alvarez, Luis Carlos Maria Remis, Justin Gottschlich
-
Patent number: 11093530Abstract: Technologies for management of data layers in a heterogeneous geographic information system (GIS) map are disclosed. A compute device may maintain a GIS database that includes geo-quads that represent physical locations of various scales. Data layers and layer tracks may be dynamically added to the GIS database at different scales, allowing for an extensible framework that enables a mechanism for integrating additional functionality. In the illustrative embodiment, a graph database is used to store the GIS database, allowing for a flexible structure. In some embodiments, entries in layer tracks may include binary large objects that may have properties and associated methods, allowing for application-specific functionality.Type: GrantFiled: June 28, 2019Date of Patent: August 17, 2021Assignee: Intel CorporationInventors: David Israel Gonzalez Aguirre, Javier Felip Leon, Maria Soledad Elli, Luis Carlos Maria Remis, Javier Sebastian Turek
-
Patent number: 11061650Abstract: Methods and apparatus to automatically generate code for graphical user interfaces are disclosed. An example apparatus includes a textual description analyzer to encode a user-provided textual description of a GUI design using a first neural network. The example apparatus further includes a DSL statement generator to generate a DSL statement with a second neural network. The DSL statement is to define a visual element of the GUI design. The DSL statement is generated based on at least one of the encoded textual description or a user-provided image representative of the GUI design. The example apparatus further includes a rendering tool to render a mockup of the GUI design based on the DSL statement.Type: GrantFiled: June 27, 2019Date of Patent: July 13, 2021Assignee: Intel CorporationInventors: Javier Sebastian Turek, Javier Felip Leon, Luis Carlos Maria Remis, David Israel Gonzalez Aguirre, Ignacio Javier Alvarez, Justin Gottschlich
-
Publication number: 20210157968Abstract: Systems and methods for determining a configuration for a microarchitecture are described herein. An example system includes a proposal generator to generate a first candidate configuration of parameters for the microarchitecture, a machine learning model to process the first candidate configuration of parameters to output estimated performance indicators for the microarchitecture, an uncertainty checker to determine whether the estimated performance indicators are reliable, and a performance checker. In response to a determination that the estimated performance indicators are reliable, the performance checker is to determine whether the estimated performance indicators have improved toward a target. Further, if the estimated performance indicators have improved, the performance checker is to store the first candidate configuration of parameters in a memory as a potential solution for a microarchitecture without performing a full simulation on the first candidate configuration of parameters.Type: ApplicationFiled: November 30, 2020Publication date: May 27, 2021Inventors: Javier Sebastián Turek, Javier Felip Leon, Alexander Heinecke, Evangelos Georganas, Luis Carlos Maria Remis, Ignacio Javier Alvarez, David Israel Gonzalez Aguirre, Shengtian Zhou, Justin Gottschlich
-
Publication number: 20210150323Abstract: Methods, apparatus, systems and articles of manufacture are disclosed to implement a neural network. An apparatus to implement a neural network, the apparatus comprising memory formed on a substrate, neural network inference logic formed on the same substrate as the memory, the neural network inference logic to load a plurality of neural network parameters in a multiply-accumulate register, and perform a sample-multiply-add operation on the neural network parameter values and input data to generate a neural network inference result, and a memory controller to transfer the neural network inference result to at least one of a host memory external to the substrate or a host processor external to the substrate.Type: ApplicationFiled: December 23, 2020Publication date: May 20, 2021Inventors: Javier Sebastian Turek, Ignacio J. Alvarez, David Israel Gonzalez Aguirre, Javier Felip Leon, Maria Soledad Elli
-
Publication number: 20210114606Abstract: A vehicle control system (VCS) for a vehicle may include an in-vehicle bus and an intrusion detection system (IDS). The IDS may: calculate a planned output of the vehicle based on a message of a message stream received from at least one electronic control unit (ECU) coupled to the in-vehicle bus, calculate a reachable set based on an uncertainty metric, and identify an intrusion of the VCS based on a comparison of the planned output and the reachable set.Type: ApplicationFiled: December 23, 2020Publication date: April 22, 2021Inventors: Ignacio J. Alvarez, Maria Soledad Elli, Javier Felip Leon, Javier Sebastian Turek, David Israel Gonzalez Aguirre
-
Publication number: 20210001884Abstract: Systems, apparatuses and methods may provide for technology that generates, via a first neural network such as a grid network, a first vector representing a prediction of future behavior of an autonomous vehicle based on a current vehicle position and a vehicle velocity. The technology may also generate, via a second neural network such as an obstacle network, a second vector representing a prediction of future behavior of an external obstacle based on a current obstacle position and an obstacle velocity, and determine, via a third neural network such as a place network, a future trajectory for the vehicle based on the first vector and the second vector, the future trajectory representing a sequence of planned future behaviors for the vehicle. The technology may also issue actuation commands to navigate the autonomous vehicle based on the future trajectory for the vehicle.Type: ApplicationFiled: June 27, 2020Publication date: January 7, 2021Inventors: Ignacio J. Alvarez, Vy Vo, Javier Felip Leon, Javier Perez-Ramirez, Javier Sebastian Turek, Mariano Tepper, David Israel Gonzalez Aguirre
-
Patent number: 10853554Abstract: Systems and methods for determining a configuration for a microarchitecture are described herein. An example system includes a proposal generator to generate a first candidate configuration of parameters for the microarchitecture, a machine learning model to process the first candidate configuration of parameters to output estimated performance indicators for the microarchitecture, an uncertainty checker to determine whether the estimated performance indicators are reliable, and a performance checker. In response to a determination that the estimated performance indicators are reliable, the performance checker is to determine whether the estimated performance indicators have improved toward a target. Further, if the estimated performance indicators have improved, the performance checker is to store the first candidate configuration of parameters in a memory as a potential solution for a microarchitecture without performing a full simulation on the first candidate configuration of parameters.Type: GrantFiled: June 28, 2019Date of Patent: December 1, 2020Assignee: Intel CorporationInventors: Javier Sebastian Turek, Javier Felip Leon, Alexander Heinecke, Evangelos Georganas, Luis Carlos Maria Remis, Ignacio Javier Alvarez, David Israel Gonzalez Aguirre, Shengtian Zhou, Justin Gottschlich
-
Publication number: 20200364107Abstract: Systems, apparatuses and methods may provide for technology that identifies a sequence of events associated with a computer architecture, categorizes, with a natural language processing system, the sequence of events into a sequence of words, identifying an anomaly based on the sequence of words and triggering an automatic remediation process in response to an identification of the anomaly.Type: ApplicationFiled: June 27, 2020Publication date: November 19, 2020Inventors: Javier Sebastian Turek, Vy Vo, Javier Perez-Ramirez, Marocs Carranza, Mateo Guzman, Cesar Martinez-Spessot, Dario Oliver
-
Publication number: 20200326949Abstract: Systems, apparatuses and methods may provide for technology that recognizes, via a neural network, a pattern of memory access and compute instructions based on an input set of machine instructions, determines, via a neural network, a sequence of instructions to be offloaded for execution by the secondary computing device based on the recognized pattern of memory access and compute instructions, and translates the sequence of instructions to be offloaded from instructions executable by a central processing unit (CPU) into instructions executable by the secondary computing device.Type: ApplicationFiled: June 27, 2020Publication date: October 15, 2020Inventors: Vy Vo, Dipanjan Sengupta, Mariano Tepper, Javier Sebastian Turek