Patents by Inventor Jaw-Ming DING
Jaw-Ming DING has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11558017Abstract: A power amplifier circuit includes a current generator and a current mirror driver. The current generator has a first input connected to a first voltage supply and an output configured to generate a first current. The current generator includes a first transistor, a second transistor, a first resistor and a second resistor. The first transistor has an emitter connected to ground. The second transistor has a base connected to a base of the first transistor and an emitter connected to ground. The first resistor is connected between the first voltage supply and a collector of the first transistor. The second resistor is connected between the first voltage supply and a collector of the second transistor. The current mirror drive has a first input connected to the output of the current generator to receive the first current and an output configured to generate a second current.Type: GrantFiled: September 18, 2019Date of Patent: January 17, 2023Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.Inventor: Jaw-Ming Ding
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Patent number: 11398424Abstract: A semiconductor package structure includes a substrate. The substrate includes a first ground layer. The first ground layer has a body and a first tooth protruding from a side of the body. The first tooth has a first lateral side. The first lateral side of the first tooth is inclined relative to the side of the body in a top view of the first ground layer.Type: GrantFiled: February 18, 2020Date of Patent: July 26, 2022Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.Inventors: Jaw-Ming Ding, Ren-Hung Chou, Yi-Hung Lin
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Publication number: 20210257286Abstract: A semiconductor package structure includes a substrate. The substrate includes a first ground layer. The first ground layer has a body and a first tooth protruding from a side of the body. The first tooth has a first lateral side. The first lateral side of the first tooth is inclined relative to the side of the body in a top view of the first ground layer.Type: ApplicationFiled: February 18, 2020Publication date: August 19, 2021Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Jaw-Ming DING, Ren-Hung CHOU, Yi-Hung LIN
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Patent number: 10992266Abstract: A power amplifier circuit includes a first transistor, a second transistor and a bias circuit. The first transistor has a base configured to receive a first signal. The second transistor has an emitter connecting to a collector of the first transistor and a collector configured to output a second signal. The bias circuit is coupled to the first transistor and the second transistor. The bias circuit is configured to provide a direct current (DC) voltage at the collector of the second transistor about twice a DC voltage at the collector of the first transistor. The bias circuit is configured to provide an alternating current (AC) or radio frequency (RF) voltage at the collector of the second transistor about twice an AC or RF voltage at the collector of the first transistor.Type: GrantFiled: March 26, 2019Date of Patent: April 27, 2021Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.Inventor: Jaw-Ming Ding
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Publication number: 20210083628Abstract: A power amplifier circuit includes a current generator and a current mirror driver. The current generator has a first input connected to a first voltage supply and an output configured to generate a first current. The current generator includes a first transistor, a second transistor, a first resistor and a second resistor. The first transistor has an emitter connected to ground. The second transistor has a base connected to a base of the first transistor and an emitter connected to ground. The first resistor is connected between the first voltage supply and a collector of the first transistor. The second resistor is connected between the first voltage supply and a collector of the second transistor. The current mirror drive has a first input connected to the output of the current generator to receive the first current and an output configured to generate a second current.Type: ApplicationFiled: September 18, 2019Publication date: March 18, 2021Applicant: Advanced Semiconductor Engineering, Inc.Inventor: Jaw-Ming DING
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Patent number: 10944363Abstract: The present disclosure relates to a power amplifier circuit. The power amplifier circuit includes a voltage-controlled current source and a current mirror. The voltage-controlled current source is configured to receive a first voltage and to generate a first current. The current mirror is connected to the voltage-controlled current source and to generate a second current in response to the first current. The second current continuously changes from 0 mA to about 120 mA as the first voltage continuously changes from 0 V to about 1 V.Type: GrantFiled: June 29, 2018Date of Patent: March 9, 2021Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.Inventor: Jaw-Ming Ding
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Publication number: 20200313626Abstract: A power amplifier circuit includes a first transistor, a second transistor and a bias circuit. The first transistor has a base configured to receive a first signal. The second transistor has an emitter connecting to a collector of the first transistor and a collector configured to output a second signal. The bias circuit is coupled to the first transistor and the second transistor. The bias circuit is configured to provide a direct current (DC) voltage at the collector of the second transistor about twice a DC voltage at the collector of the first transistor. The bias circuit is configured to provide an alternating current (AC) or radio frequency (RF) voltage at the collector of the second transistor about twice an AC or RF voltage at the collector of the first transistor.Type: ApplicationFiled: March 26, 2019Publication date: October 1, 2020Applicant: Advanced Semiconductor Engineering, Inc.Inventor: Jaw-Ming DING
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Patent number: 10756025Abstract: A semiconductor package device includes: (1) a substrate having a top surface; (2) a passive component disposed on the substrate and having a top surface; (3) an active component disposed on the substrate and having a top surface; and (4) a package body disposed on the substrate, the package body including a first portion covering the active component and the passive component, and a second portion covering the passive component, wherein a top surface of the second portion of the package body is higher than a top surface of the first portion of the package body, and the first portion and the second portion of the package body include different materials.Type: GrantFiled: August 8, 2018Date of Patent: August 25, 2020Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.Inventors: Wei-Hsuan Lee, Jaw-Ming Ding, Wei-Yu Chen
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Patent number: 10651796Abstract: The present disclosure relates to a power amplifier circuit including a current source, a power control circuit, a current mirror and an output circuit. The current source circuit includes a first transistor and a second transistor. A source of the first transistor is connected to a drain of the second transistor and a gate of the first transistor is connected to a source with the second transistor. The power control circuit is connected to a gate of the second transistor. The current mirror circuit is connected to the gate of the first transistor and a source of the second transistor. The output circuit is connected to the current mirror circuit.Type: GrantFiled: February 2, 2018Date of Patent: May 12, 2020Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.Inventor: Jaw-Ming Ding
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Publication number: 20200007086Abstract: The present disclosure relates to a power amplifier circuit. The power amplifier circuit includes a voltage-controlled current source and a current mirror. The voltage-controlled current source is configured to receive a first voltage and to generate a first current. The current mirror is connected to the voltage-controlled current source and to generate a second current in response to the first current. The second current continuously changes from 0 mA to about 120 mA as the first voltage continuously changes from 0 V to about 1 V.Type: ApplicationFiled: June 29, 2018Publication date: January 2, 2020Applicant: Advanced Semiconductor Engineering, Inc.Inventor: Jaw-Ming DING
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Patent number: 10516367Abstract: The present disclosure relates to a logic control circuit including a first inverter and a voltage limiter. The first inverter is connected to a first input voltage. The first inverter includes a first transistor having a first terminal and a second terminal. The second terminal of the first transistor is connected to a ground. The voltage limiter includes a second transistor. The second transistor has a gate connected to a ground, a source connected to the first terminal of the first transistor and a drain connected to a second input voltage.Type: GrantFiled: February 2, 2018Date of Patent: December 24, 2019Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.Inventor: Jaw-Ming Ding
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Publication number: 20190245487Abstract: The present disclosure relates to a logic control circuit including a first inverter and a voltage limiter. The first inverter is connected to a first input voltage. The first inverter includes a first transistor having a first terminal and a second terminal. The second terminal of the first transistor is connected to a ground. The voltage limiter includes a second transistor. The second transistor has a gate connected to a ground, a source connected to the first terminal of the first transistor and a drain connected to a second input voltage.Type: ApplicationFiled: February 2, 2018Publication date: August 8, 2019Applicant: Advanced Semiconductor Engineering, Inc.Inventor: Jaw-Ming DING
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Publication number: 20190245488Abstract: The present disclosure relates to a power amplifier circuit including a current source, a power control circuit, a current mirror and an output circuit. The current source circuit includes a first transistor and a second transistor. A source of the first transistor is connected to a drain of the second transistor and a gate of the first transistor is connected to a source with the second transistor. The power control circuit is connected to a gate of the second transistor. The current mirror circuit is connected to the gate of the first transistor and a source of the second transistor. The output circuit is connected to the current mirror circuit.Type: ApplicationFiled: February 2, 2018Publication date: August 8, 2019Applicant: Advanced Semiconductor Engineering, Inc.Inventor: Jaw-Ming DING
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Patent number: 10157855Abstract: The present disclosure relates to a semiconductor device package and a manufacturing method thereof. The semiconductor device package includes a carrier, at least one electronic component, a first magnetic layer and a second magnetic layer. The carrier has a top surface on which the electronic component is disposed. The first magnetic layer is disposed on the top surface of the carrier and encapsulates the electronic component. The second magnetic layer is disposed on the first magnetic layer and covers a top surface and a lateral surface of the first magnetic layer. A permeability of the first magnetic layer is less than a permeability of the second magnetic layer.Type: GrantFiled: June 3, 2015Date of Patent: December 18, 2018Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.Inventors: Wei-Hsuan Lee, Chien-Yeh Liu, Sung-Mao Li, Jaw-Ming Ding
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Publication number: 20180350753Abstract: A semiconductor package device includes: (1) a substrate having a top surface; (2) a passive component disposed on the substrate and having a top surface; (3) an active component disposed on the substrate and having a top surface; and (4) a package body disposed on the substrate, the package body including a first portion covering the active component and the passive component, and a second portion covering the passive component, wherein a top surface of the second portion of the package body is higher than a top surface of the first portion of the package body, and the first portion and the second portion of the package body include different materials.Type: ApplicationFiled: August 8, 2018Publication date: December 6, 2018Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Wei-Hsuan LEE, Jaw-Ming Ding, Wei-Yu CHEN
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Patent number: 10068854Abstract: A semiconductor package device includes a substrate, a passive component, an active component and a package body. The passive component is disposed on the substrate. The active component is disposed on the substrate. The package body is disposed on the substrate. The package body includes a first portion covering the active component and the passive component, and a second portion covering the passive component. A top surface of the second portion of the package body is higher than a top surface of the first portion of the package body.Type: GrantFiled: October 24, 2016Date of Patent: September 4, 2018Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.Inventors: Wei-Hsuan Lee, Jaw-Ming Ding, Wei-Yu Chen
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Publication number: 20180114757Abstract: A semiconductor package device includes a substrate, a passive component, an active component and a package body. The passive component is disposed on the substrate. The active component is disposed on the substrate. The package body is disposed on the substrate. The package body includes a first portion covering the active component and the passive component, and a second portion covering the passive component. A top surface of the second portion of the package body is higher than a top surface of the first portion of the package body.Type: ApplicationFiled: October 24, 2016Publication date: April 26, 2018Inventors: Wei-Hsuan LEE, Jaw-Ming DING, Wei-Yu CHEN
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Publication number: 20160358862Abstract: The present disclosure relates to a semiconductor device package and a manufacturing method thereof. The semiconductor device package includes a carrier, at least one electronic component, a first magnetic layer and a second magnetic layer. The carrier has a top surface on which the electronic component is disposed. The first magnetic layer is disposed on the top surface of the carrier and encapsulates the electronic component. The second magnetic layer is disposed on the first magnetic layer and covers a top surface and a lateral surface of the first magnetic layer. A permeability of the first magnetic layer is less than a permeability of the second magnetic layer.Type: ApplicationFiled: June 3, 2015Publication date: December 8, 2016Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Wei-Hsuan Lee, Chien-Yeh Liu, Sung-Mao Li, Jaw-Ming Ding
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Patent number: 9319001Abstract: An exemplary embodiment of the present disclosure illustrates an amplifier circuit comprising an amplifier block and a biasing block. The amplifier block is used to receive an input signal and amplify the input signal to generate an output signal. The a biasing block coupled to the amplifier block is used to provide biasing voltages to bias the amplifier block, and compensate an output gain of the amplifier block before the output gain of the amplifier block is compressed, so as to extend a P1 dB compression point of the amplifier block, wherein the biasing currents are substantially independent to temperature and/or system voltage variation.Type: GrantFiled: February 24, 2014Date of Patent: April 19, 2016Assignee: Advanced Semiconductor Engineering Inc.Inventors: Jaw-Ming Ding, Rong-Hsang Ho, Jia-Hong Mou
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Patent number: 9184716Abstract: A low noise amplifier is disclosed. The low noise amplifier comprises a current mirror circuit, a bias circuit, a cascode amplifying circuit and a power gain compensating circuit. The current mirror circuit is used for providing a first current and third current. The bias circuit is used for receiving a first current and third current and outputting a first bias voltage and a second bias voltage according to the first current and third current. The cascode amplifying circuit respectively receives the first bias voltage and the second bias voltage, and accordingly to work at an operation bias point. The power gain compensating circuit is used for receiving a RF output signal and accordingly outputs a gain compensating signal to the current mirror circuit so as to dynamically adjust current value of the first current and third current and further to compensates power gain of the low noise amplifier in order to increase 1 dB gain compression point (P1 dB).Type: GrantFiled: March 28, 2014Date of Patent: November 10, 2015Assignee: ADVANCED SEMICONDUCTOR ENGINEERING INC.Inventors: Jaw-Ming Ding, Jia-Hong Mou