Patents by Inventor Jaw-Shiun Hsieh

Jaw-Shiun Hsieh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20020195721
    Abstract: In a cavity down BGA packaging structure, a circuit substrate is bonded onto a heat spreader. A cavity formed is formed in the circuit substrate into which a chip is bonded onto the heat spreader. The circuit substrate has at least an insulating layer, a patterned wiring layer, and a via electrically connected to the heat spreader. A first ground pad, ball pad, and first contact pad are defined on the patterned wiring layer, wherein the first ground pad is spaced apart from and electrically connected to the via. The chip comprises at least a second contact pad and a second ground pad respectively connected to the first contact pad and the heat spreader. An encapsulant material encapsulates the cavity, the chip, and the first and second contact pads. A plurality of solder balls are attached to the first ground pad and ball pad.
    Type: Application
    Filed: March 5, 2002
    Publication date: December 26, 2002
    Inventors: Chun-Chi Lee, Jaw-Shiun Hsieh, Yao-Hsin Feng, Hou-Chang Kuo, Kuan-Neng Liao, Yu-Hsien Lin
  • Patent number: 6429049
    Abstract: A laser method for forming vias comprises: providing a heat sink; locally oxidizing a surface of the heat sink into a copper oxide film; bonding a substrate onto the heat sink at the copper oxide layer locations, wherein the substrate comprises at least a patterned trace layer and an insulating layer to which is bonded the heat sink, the insulating layer comprising a plurality of through holes that expose the portions of the copper oxide film; removing the copper oxide exposed through the through holes by laser beam; disposing a plurality of solder balls respectively in the through holes; and reflowing the solder balls to form a plurality of vias.
    Type: Grant
    Filed: June 5, 2001
    Date of Patent: August 6, 2002
    Assignee: Advanced Semiconductor Engineering, Inc.
    Inventors: Chun-Chi Lee, Jaw-Shiun Hsieh, Yao-Hsin Feng, Shyh-Ing Wu, Kuan-Neng Liao, Chin-Pei Tien
  • Publication number: 20010022315
    Abstract: The ball bump mainly includes a body and a protrusion. The protrusion is located at the upper of the body and essentially consists of a flat upper surface with an annular inclination. The flat upper surface and the annular inclination together define the area for wire bonding.
    Type: Application
    Filed: April 23, 2001
    Publication date: September 20, 2001
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Yu-Fang Tsai, Jaw-Shiun Hsieh
  • Patent number: 6244499
    Abstract: The ball bump mainly includes a body and a protrusion. The protrusion is located at the upper of the body and essentially consists of a flat upper surface with an annular inclination. The flat upper surface and the annular inclination together define the area for wire bonding.
    Type: Grant
    Filed: December 13, 1999
    Date of Patent: June 12, 2001
    Assignee: Advanced Semiconductor Engineering, Inc.
    Inventors: Yu-Fang Tsai, Jaw-Shiun Hsieh