Patents by Inventor Jay B. Fletcher

Jay B. Fletcher has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20190140539
    Abstract: A system that includes a regulator unit is disclosed. The regulator unit includes first and second phase units whose outputs are coupled to through first and second coupled inductors, respectively, to a power supply node of a circuit block. The first phase unit may be configured to discharge, for a first period of time, the power supply node through the first inductor in response to determining a sense current is greater than a demand current. The operation of the second phase unit may follow that of the first phase unit after a second period of time has elapsed.
    Type: Application
    Filed: November 5, 2018
    Publication date: May 9, 2019
    Inventors: Sanjay Pant, Fabio Gozzini, Jay B. Fletcher, Shawn Searles
  • Patent number: 10234883
    Abstract: A voltage regulator circuit is disclosed. In one embodiment, a low drop-out (LDO) voltage regulator includes a voltage loop and a current loop. The current loop includes a source follower coupled to an output node of the LDO voltage regulator, the source follower being implemented with a PMOS transistor. The current loop also includes a current mirror coupled between a first branch of the current loop and a second branch of the current loop. The source follower is implemented in the second branch of the current loop. The voltage loop includes an amplifier circuit having an inverting input coupled to the output node, and a non-inverting input coupled to receive a reference voltage. The output of the amplifier is coupled to the gate terminal of the PMOS transistor of the current mirror.
    Type: Grant
    Filed: December 18, 2017
    Date of Patent: March 19, 2019
    Assignee: Apple Inc.
    Inventors: Dingkun Du, Jay B. Fletcher
  • Patent number: 10146240
    Abstract: A voltage regulator having a pre-regulator circuit is disclosed. A low dropout (LDO) voltage regulator includes an amplifier circuit, a current buffer circuit, and a pre-regulator circuit. The current buffer circuit includes a transistor having a gate terminal coupled to the amplifier output. The current buffer provides a current based at least in part on the output signal generated by the amplifier. The pre-regulator circuit is coupled to provide a dynamic supply voltage to the current buffer. They dynamic supply voltage depends at least in part on a fixed supply voltage provided thereto, as well as the output voltage provided by the LDO voltage regulator.
    Type: Grant
    Filed: February 1, 2018
    Date of Patent: December 4, 2018
    Assignee: Apple Inc.
    Inventors: Ruopeng Wang, Dashun Xue, Jiandong Jiang, Jay B. Fletcher
  • Patent number: 10122275
    Abstract: A system that includes a regulator unit is disclosed. The regulator unit includes first and second phase units whose outputs are coupled to through first and second coupled inductors, respectively, to a power supply node of a circuit block. The first phase unit may be configured to discharge, for a first period of time, the power supply node through the first inductor in response to determining a sense current is greater than a demand current. The operation of the second phase unit may follow that of the first phase unit after a second period of time has elapsed.
    Type: Grant
    Filed: January 11, 2017
    Date of Patent: November 6, 2018
    Assignee: Apple Inc.
    Inventors: Sanjay Pant, Fabio Gozzini, Jay B. Fletcher, Shawn Searles
  • Patent number: 10122269
    Abstract: A system that includes a regulator circuit is disclosed. The regulator circuit includes first and second phase units whose outputs are coupled to a power supply node of a circuit block, via respective coupled inductors. The first phase unit may initiate a charge cycle of the power supply node in response to assertion of a clock signal and generate a compensated current using currents measure through both inductors and the clock signal. In response to a determination that the compensated current is greater than a demand current generated using a voltage level of the power supply node and a reference voltage, the first phase unit may halt the charge cycle.
    Type: Grant
    Filed: January 10, 2017
    Date of Patent: November 6, 2018
    Assignee: Apple Inc.
    Inventors: Fabio Gozzini, Jay B. Fletcher, Shawn Searles, Sanjay Pant
  • Patent number: 9989981
    Abstract: A voltage regulator is disclosed. The voltage regulator is cascaded, including first and second stages. The first stage may be a capacitor-less first stage that includes a source follower implemented with a first PMOS transistor, with the first PMOS transistor receiving a first reference voltage on its respective gate terminal. The first stage is coupled to receive a first voltage from an external voltage supply, and to provide a second voltage to the second stage. The second stage may be directly and exclusively coupled to the first stage, with no capacitor or connection for one coupled to the first stage output. The second stage may provide an output voltage, on an output node, with the output voltage being less than the second voltage.
    Type: Grant
    Filed: June 16, 2017
    Date of Patent: June 5, 2018
    Assignee: Apple Inc.
    Inventors: Dingkun Du, Jay B. Fletcher
  • Publication number: 20180083532
    Abstract: A system that includes a regulator circuit is disclosed. The regulator circuit includes first and second phase units whose outputs are coupled to a power supply node of a circuit block, via respective coupled inductors. The first phase unit may initiate a charge cycle of the power supply node in response to assertion of a clock signal and generate a compensated current using currents measure through both inductors and the clock signal. In response to a determination that the compensated current is greater than a demand current generated using a voltage level of the power supply node and a reference voltage, the first phase unit may halt the charge cycle.
    Type: Application
    Filed: January 10, 2017
    Publication date: March 22, 2018
    Inventors: Fabio Gozzini, Jay B. Fletcher, Shawn Searles, Sanjay Pant
  • Publication number: 20180083534
    Abstract: A system that includes a regulator unit is disclosed. The regulator unit includes first and second phase units whose outputs are coupled to through first and second coupled inductors, respectively, to a power supply node of a circuit block. The first phase unit may be configured to discharge, for a first period of time, the power supply node through the first inductor in response to determining a sense current is greater than a demand current. The operation of the second phase unit may follow that of the first phase unit after a second period of time has elapsed.
    Type: Application
    Filed: January 11, 2017
    Publication date: March 22, 2018
    Inventors: Sanjay Pant, Fabio Gozzini, Jay B. Fletcher, Shawn Searles
  • Patent number: 9843330
    Abstract: An apparatus is disclosed, including a driver circuit, a comparator circuit, and a counter circuit. The driver circuit may be configured to source a current to a load circuit. The comparator circuit may be configured to perform a comparison of a reference voltage to a voltage across the load circuit. The counter circuit may be configured to modify a digital count value based on the comparison. The driver circuit may be further configured to adjust a value of the current using the digital count value.
    Type: Grant
    Filed: September 22, 2016
    Date of Patent: December 12, 2017
    Assignee: Apple Inc.
    Inventors: Hubert Attah, Jay B. Fletcher, Erick O. Torres, Fabio Gozzini
  • Publication number: 20170090501
    Abstract: A system that includes a regulator unit is disclosed. The regulator unit includes first and second phase units whose outputs are coupled to a common output node. Each of the phase units may be configured to source current to the output node in response to the assertion of a respective clock signal in order to generate a regulated supply voltage. Each phase unit includes a respective transconductance amplifier configured to generate a respective demand current dependent upon a reference voltage and the regulated supply voltage.
    Type: Application
    Filed: September 30, 2015
    Publication date: March 30, 2017
    Inventors: Jay B. Fletcher, Shawn Searles, Fabio Gozzini, Sanjay Pant
  • Patent number: 9306457
    Abstract: A method and apparatus for monitoring instantaneous load current is disclosed. In one embodiment, an integrated circuit includes a voltage regulator and at least one functional unit implemented thereon. The voltage regulator includes a supply circuit configured to provide a voltage to the functional unit, and a sense circuit configured to determine an amount of current provided to the functional unit by the supply circuit. The sense circuit may determine the instantaneous load current being provided to the functional unit. An indication circuit is configured to provide, to the functional unit, an indication of the amount of current supplied thereto by the supply circuit.
    Type: Grant
    Filed: December 4, 2013
    Date of Patent: April 5, 2016
    Assignee: Apple Inc.
    Inventors: Shawn Searles, Jay B. Fletcher
  • Publication number: 20150155780
    Abstract: A method and apparatus for monitoring instantaneous load current is disclosed. In one embodiment, an integrated circuit includes a voltage regulator and at least one functional unit implemented thereon. The voltage regulator includes a supply circuit configured to provide a voltage to the functional unit, and a sense circuit configured to determine an amount of current provided to the functional unit by the supply circuit. The sense circuit may determine the instantaneous load current being provided to the functional unit. An indication circuit is configured to provide, to the functional unit, an indication of the amount of current supplied thereto by the supply circuit.
    Type: Application
    Filed: December 4, 2013
    Publication date: June 4, 2015
    Applicant: Apple Inc.
    Inventors: Shawn Searles, Jay B. Fletcher
  • Publication number: 20120206192
    Abstract: A bandgap reference circuit includes an amplifier configured to provide an output voltage dependent upon voltages appearing at an inverting input and a non-inverting input. The bandgap reference circuit also includes a first transistor coupled between the non-inverting input and a circuit ground reference, and a first resistor coupled to the inverting input. The bandgap reference circuit also includes a number of second transistors coupled in parallel between the circuit ground reference and the first resistor. At least a portion of the second transistors are connected to the first resistor through a plurality of programmably selectable switches.
    Type: Application
    Filed: February 15, 2011
    Publication date: August 16, 2012
    Inventors: Jay B. Fletcher, Steven C. Meyers