Patents by Inventor Jay Curless

Jay Curless has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7141857
    Abstract: Semiconductor structures and processes for fabricating semiconductor structures comprising hafnium oxide layers modified with lanthanum oxide or a lanthanide-series metal oxide are provided. A semiconductor structure in accordance with an embodiment of the invention comprises an amorphous layer of hafnium oxide overlying a substrate. A lanthanum-containing dopant or a lanthanide-series metal-containing dopant is comprised within the amorphous layer of hafnium oxide. The process comprises growing an amorphous layer of hafnium oxide overlying a substrate. The amorphous layer of hafnium oxide is doped with a dopant having the chemical formulation LnOx, where Ln is lanthanum, a lanthanide-series metal, or a combination thereof, and X is any number greater than zero. The doping step may be performed during or after growth of the amorphous layer of hafnium oxide.
    Type: Grant
    Filed: June 30, 2004
    Date of Patent: November 28, 2006
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Zhiyi Yu, Jay A. Curless, Yong Liang, Alexandra Navrotsky, Sergey Ushakov, Bich-Yen Nguyen, Alexander Demkov
  • Publication number: 20060003602
    Abstract: Semiconductor structures and processes for fabricating semiconductor structures comprising hafnium oxide layers modified with lanthanum oxide or a lanthanide-series metal oxide are provided. A semiconductor structure in accordance with an embodiment of the invention comprises an amorphous layer of hafnium oxide overlying a substrate. A lanthanum-containing dopant or a lanthanide-series metal-containing dopant is comprised within the amorphous layer of hafnium oxide. The process comprises growing an amorphous layer of hafnium oxide overlying a substrate. The amorphous layer of hafnium oxide is doped with a dopant having the chemical formulation LnOx, where Ln is lanthanum, a lanthanide-series metal, or a combination thereof, and X is any number greater than zero. The doping step may be performed during or after growth of the amorphous layer of hafnium oxide.
    Type: Application
    Filed: June 30, 2004
    Publication date: January 5, 2006
    Inventors: Zhiyi Yu, Jay Curless, Yong Liang
  • Patent number: 6852588
    Abstract: Methods are provided for fabricating semiconductor structures and semiconductor device structures utilizing epitaxial Hf3Si2 layers. A process in accordance with one embodiment of the invention begins by disposing a silicon substrate in a processing chamber. The pressure within the processing chamber and a temperature of the silicon substrate in the range of approximately 250° C. to approximately 700° C. is established. A layer of Hf3Si2 then is grown overlying the silicon substrate at a rate in the range of about one (1) to about five (5) monolayers per minute.
    Type: Grant
    Filed: June 30, 2004
    Date of Patent: February 8, 2005
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Zhiyi Yu, Jay A. Curless, Yong Liang
  • Patent number: 6589856
    Abstract: High quality epitaxial layers of monocrystalline materials can be grown overlying monocrystalline substrates such as large silicon wafers by forming a compliant substrate for growing the monocrystalline layers. An accommodating buffer layer comprises a layer of monocrystalline oxide spaced apart from a silicon wafer by an amorphous interface layer of silicon oxide. The amorphous interface layer dissipates strain and permits the growth of a high quality monocrystalline oxide accommodating buffer layer. The accommodating buffer layer has a lattice registry to both the underlying silicon wafer and the overlying monocrystalline material layer. Any lattice mismatch between the accommodating buffer layer and the underlying silicon substrate is taken care of by the amorphous interface layer. In addition, formation of a compliant substrate may include utilizing surfactant enhanced epitaxy, epitaxial growth of single crystal silicon onto single crystal oxide, and epitaxial growth of Zintl phase materials.
    Type: Grant
    Filed: August 6, 2001
    Date of Patent: July 8, 2003
    Assignee: Motorola, Inc.
    Inventor: Jay A. Curless
  • Publication number: 20030027408
    Abstract: High quality epitaxial layers of monocrystalline materials can be grown overlying monocrystalline substrates such as large silicon wafers by forming a compliant substrate for growing the monocrystalline layers. An accommodating buffer layer comprises a layer of monocrystalline oxide spaced apart from a silicon wafer by an amorphous interface layer of silicon oxide. The amorphous interface layer dissipates strain and permits the growth of a high quality monocrystalline oxide accommodating buffer layer. The accommodating buffer layer has a lattice registry to both the underlying silicon wafer and the overlying monocrystalline material layer. Any lattice mismatch between the accommodating buffer layer and the underlying silicon substrate is taken care of by the amorphous interface layer. In addition, formation of a compliant substrate may include utilizing surfactant enhanced epitaxy, epitaxial growth of single crystal silicon onto single crystal oxide, and epitaxial growth of Zintl phase materials.
    Type: Application
    Filed: August 6, 2001
    Publication date: February 6, 2003
    Applicant: MOTOROLA, INC.
    Inventor: Jay A. Curless
  • Publication number: 20030024471
    Abstract: Semiconductor structures are provided with high quality epitaxial layers of monocrystalline materials grown overlying monocrystalline substrates such as large silicon wafers by forming a compliant substrate for growing the monocrystalline layers. An accommodating buffer layer comprises a layer of monocrystalline oxide spaced apart from a silicon wafer by an amorphous interface layer of silicon oxide. The accommodating buffer layer is lattice matched to both the underlying silicon wafer and an overlying monocrystalline material layer. With laser assisted fabrication, a laser energy source is used to preclean the accommodating buffer layer, to excite the accommodating buffer layer to higher energy to promote two-dimensional growth, and to amorphize the accommodating buffer layer, without requiring transport of the semiconductor structure from one environment to another.
    Type: Application
    Filed: August 6, 2001
    Publication date: February 6, 2003
    Applicant: MOTOROLA, INC.
    Inventors: Albert Alec Talin, Jay A. Curless, Ravindranath Droopad, Joyce Yamamoto
  • Publication number: 20030015704
    Abstract: Process for fabrication of semiconductor structures and devices (267, 270) including an intermediate surface cleaning procedure performed to remove metal contaminants in the surface region (262) of a seed film (261) of a monocrystalline compound semiconductor material that is formed overlying a perovskite oxide film (24), which is the source of the contaminants. After removal of the contaminated surface region (262), monocrystalline compound semiconductor material is regrown on the remaining seed film (264) to form a layer (266) having a thickness suitable for forming devices therein.
    Type: Application
    Filed: July 23, 2001
    Publication date: January 23, 2003
    Applicant: MOTOROLA, INC.
    Inventor: Jay A. Curless
  • Publication number: 20030015760
    Abstract: Process for fabricating a semiconductor structure (500) comprising depositing a capping layer (67) on a portion (54) of a monocrystalline compound semiconductor layer (66) overlying a template film (64), a monocrystalline perovskite oxide material (60), an amorphous oxide layer (62) and a monocrystalline silicon substrate (52), and then exposing at least one surface region (531) of the single crystal silicon substrate (52) into which a CMOS circuit (56) is formed in a CMOS region (53), followed by heating the CMOS circuit (56) to anneal the CMOS region (53) and, optionally, concurrently transform the monocrystalline perovskite oxide film (60) into an amorphous perovskite oxide film (136). The resulting composite semiconductor structure (500) is also encompassed.
    Type: Application
    Filed: July 20, 2001
    Publication date: January 23, 2003
    Applicant: Motorola, Inc.
    Inventors: Jay A. Curless, Albert A. Talin
  • Publication number: 20030017720
    Abstract: High quality epitaxial layers of monocrystalline materials can be grown overlying monocrystalline substrates such as large silicon wafers by forming a compliant substrate for growing the monocrystalline layers. An accommodating buffer layer comprises a layer of monocrystalline oxide spaced apart from a silicon wafer by an amorphous interface layer of silicon oxide. The amorphous interface layer dissipates strain and permits the growth of a high quality monocrystalline oxide accommodating buffer layer. The accommodating buffer layer has lattice registry to both the underlying silicon wafer and the overlying monocrystalline material layer. Formation of a compliant substrate preferably includes utilizing enhanced epitaxy of a surfactant template layer. The surfactant template layer may be formed by depositing an organometallic compound on the accommodating buffer layer using atomic layer epitaxy. In certain preferred embodiments, the organometallic compound is an aluminum-containing compound.
    Type: Application
    Filed: July 20, 2001
    Publication date: January 23, 2003
    Applicant: MOTOROLA, INC.
    Inventors: Jay A. Curless, Lyndee L. Hilt
  • Publication number: 20030015731
    Abstract: Process for fabricating a semiconductor structure (34), and the resulting products, having reduced crystal defects and/or contamination in a monocrystalline compound semiconductor layer (26) that is compliantly attached to a monocrystalline semiconductor substrate (22) via an accommodating buffer layer (36), a capping/template layer (30), and a thin monocrystalline compound semiconductor seed film (38) comprised of a compound semiconductor, in that order from furthest to closest to layer (26).
    Type: Application
    Filed: July 23, 2001
    Publication date: January 23, 2003
    Applicant: Motorola, Inc.
    Inventors: Jay A. Curless, Lyndee L. Hilt, Albert A. Talin
  • Publication number: 20030017626
    Abstract: High quality epitaxial layers of monocrystalline materials can be grown overlying monocrystalline substrates such as large silicon wafers by forming a compliant substrate for growing the monocrystalline layers. An accommodating buffer layer comprises a layer of monocrystalline oxide spaced apart from a silicon wafer by an amorphous interface layer of silicon oxide. The amorphous interface layer dissipates strain and permits the growth of a high quality monocrystalline oxide accommodating buffer layer. The accommodating buffer layer is lattice matched to both the underlying silicon wafer and the overlying monocrystalline material layer. Any lattice mismatch between the accommodating buffer layer and the underlying silicon substrate is taken care of by the amorphous interface layer. In addition, formation of a compliant substrate may include utilizing surfactant enhanced epitaxy, epitaxial growth of single crystal silicon onto single crystal oxide, and epitaxial growth of Zintl phase materials.
    Type: Application
    Filed: July 23, 2001
    Publication date: January 23, 2003
    Applicant: MOTOROLA INC.
    Inventors: Lyndee L. Hilt, Jay A. Curless, Paige M. Holm
  • Publication number: 20010023660
    Abstract: A method for fabricating a semiconductor structure comprises the steps of providing a silicon substrate (10) having a surface (12); forming on the surface of the silicon substrate an interface (14) comprising a single atomic layer of silicon, oxygen, and a metal; and forming one or more layers of a single crystal oxide (26) on the interface. The interface comprises an atomic layer of silicon, oxygen, and a metal in the form XSiO2, where X is a metal.
    Type: Application
    Filed: June 4, 2001
    Publication date: September 27, 2001
    Applicant: MOTOROLA, INC.
    Inventors: Zhiyi Yu, Ravindranath Droopad, Corey Daniel Overgaard, Jamal Ramdani, Jay A. Curless, Jerald A. Hallmark, William J. Ooms, Jun Wang
  • Patent number: 6241821
    Abstract: A method for fabricating a semiconductor structure comprises the steps of providing a silicon substrate (10) having a surface (12); forming on the surface of the silicon substrate an interface (14) comprising a single atomic layer of silicon, oxygen, and a metal; and forming one or more layers of a single crystal oxide (26) on the interface. The interface comprises an atomic layer of silicon, oxygen, and a metal in the form XSiO2, where X is a metal.
    Type: Grant
    Filed: March 22, 1999
    Date of Patent: June 5, 2001
    Assignee: Motorola, Inc.
    Inventors: Zhiyi Yu, Ravindranath Droopad, Corey Daniel Overgaard, Jamal Ramdani, Jay A. Curless, Jerald A. Hallmark, William J. Ooms, Jun Wang
  • Patent number: 6224669
    Abstract: A method for fabricating a semiconductor structure comprises the steps of providing a silicon substrate (10) having a surface (12); forming on the surface of the silicon substrate an interface (14) comprising a single atomic layer of silicon, oxygen, and a metal; and forming one or more layers of a single crystal oxide (26) on the interface. The interface comprises an atomic layer of silicon, oxygen, and a metal in the form XSiO2, where X is a metal.
    Type: Grant
    Filed: September 14, 2000
    Date of Patent: May 1, 2001
    Assignee: Motorola, Inc.
    Inventors: Zhiyi Yi, Ravindranath Droopad, Corey Daniel Overgaard, Jamal Ramdani, Jay A. Curless, Jerald A. Hallmark, William J. Ooms, Jun Wang