Abstract: A low voltage indicator circuit including a self-biased driver circuit. A voltage at the output terminal is used to create a bias voltage to operate the driver when less than a threshold voltage is present on at least one voltage supply line. A transistor for supplying base drive current to the driver has a base coupled to the at least one voltage supply line in one embodiment and to the bias circuit in other embodiments. The transistor in the one embodiment provides base drive current to the driver when voltage on the at least one voltage supply line is less than the voltage on the output terminal by at least a predetermined amount. In other embodiments, the bias circuit may include a FET or resistor coupled between the output terminal and the base of a bias circuit transistor. The bias circuit transistor has a terminal connected to a bias resistor for providing current through the bias resistor when the bias circuit transistor is turned on.

Abstract: A single supply, TTL-compatible, class A-B signal buffer architecture comprises a multistage emitter-follower transistor circuit that is coupled between an input terminal and an output terminal capable of sinking and sourcing current to TTL specifications. A reference emitter-follower transistor stage is coupled in parallel with one of the emitter-follower transistor stages of the multistage emitter-follower transistor circuit, and a common emitter, current control transistor stage has its emitter-collector path coupled between the output terminal and ground for controlling the operation of the multistage emitter-follower transistor circuit. A differential amplifier stage, one arm of which is used to controllably forward bias the base-emitter junction of the current control transistor, has a first input coupled to the reference emitter-follower transistor stage and a second input coupled to the one emitter-follower transistor stage of the multistage emitter-follower transistor circuit.

Abstract: A method of forming an aligned vertical oxide fuse and emitter using a single mask. The mask includes an opening through which impurities are introduced into the base region through a first layer of insulation and which is subsequently used to form the emitter aperture through the first insulative layer. The thin fuse oxide is formed by non-selective oxidation after removal of the mask. Alternatively, the impurities may also be introduced through the emitter aperture or from doped thin fuse oxide after removal of the mask. The resulting integrated circuit includes at least three regions of oxidation of three thicknesses, in descending order, field oxide, device opening or gate oxide and fuse oxide.