Patents by Inventor Jay Fukumoto

Jay Fukumoto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20070139031
    Abstract: A method for characterizing the current as a function of applied electric field for a resistor exposed to a high electric fields is described. The method uses current versus voltage measurements at low electric fields, where the resistor is not damaged and the current does not saturate. An example illustrating the importance of such resistor characterization is provided.
    Type: Application
    Filed: December 19, 2005
    Publication date: June 21, 2007
    Inventors: Sangjune Park, Jay Fukumoto, Kenneth Paradis
  • Publication number: 20060089001
    Abstract: Techniques are provided for localized use of high-K dielectric material within a capacitor structure. Low-K dielectric is deposited or spun on as usual. Then, a larger area is etched back and then filled with high-K dielectric material. The high-K dielectric material is then patterned and copper routing lines are trenched in and then filled with metal. A dual damascene process may be used to connect a second metal layer using a series of vias for each metal line. In an aluminum process, an insulator layer is formed over the substrate and an aluminum layer is formed over the insulator layer. The aluminum layer is etched back to for metal lines over the insulator layer. The remaining area is filled with low-K dielectric. Then, the area between the metal lines is etched back and filled with high-K dielectric to increase the capacitance value of the structure.
    Type: Application
    Filed: October 27, 2004
    Publication date: April 27, 2006
    Inventors: Sean Erickson, Jay Fukumoto
  • Publication number: 20050116301
    Abstract: A voltage-controlled, variable polysilicon resistor is formed of polysilicon deposited in the first interlayer dielectric layer at the same time that polysilicon routing is created. The polysilicon resistor, which is formed of n? doped polysilicon, has three contact regions connected to the metal layers. A region at either end of the resistor is doped n+ and forms the positive and negative terminals of the resistor. A third contact region is located within the polysilicon region between the first and second contacts to form a Schottky diode such that application of a voltage to this contact forms a depletion region within the polysilicon region. The depletion region changes in size depending on the voltage applied to the third contact to change the resistance of the depletion resistor.
    Type: Application
    Filed: December 1, 2003
    Publication date: June 2, 2005
    Inventors: Jonathan Shaw, Jay Fukumoto, Sean Erickson
  • Publication number: 20050062586
    Abstract: The present invention provides a diffusion resistor that is formed in the substrate. A diffusion region is formed within the substrate that contains a first and second contact region. These contact regions extend downward from the surface of the substrate. A third contact is located within the diffusion region between the first and second contacts. This contact also extends downward from the surface of the substrate. These contacts are connected to metal layers. The first and second contacts form the two ends of the diffusion resistor. The third contact forms a Schottky diode such that application of a voltage to this contact forms a depletion region within the diffusion region. The depletion region changes in size depending on the voltage applied to the third contact to change the resistance of the depletion resistor.
    Type: Application
    Filed: September 23, 2003
    Publication date: March 24, 2005
    Inventors: Sean Erickson, Jonathan Shaw, Jay Fukumoto