Abstract: A method, circuit and drive for improving clock recovery in clock/data signals are provided. A timing reference is provided to a locking loop circuit, such as a PLL. The timing reference is updated based on an expectation of a frequency of a clock being recovered. A system clock tracked to each clock being recovered is outputted. A current frequency of each system clock is approximated, and the expectation updated based on the approximated current frequency of one or more of the system clocks. If the data stream includes data separated into a series of blocks, the update may be made after an end of a block and before a beginning of a succeeding block. The approximation may be made periodically and/or numerous times for each block.